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Miller" , Jakub Kicinski , Paolo Abeni , Eric Dumazet , "Andrew Lunn" CC: Gal Pressman , Leon Romanovsky , "Yael Chemla" , Saeed Mahameed , "Leon Romanovsky" , Tariq Toukan , "Jonathan Corbet" , , , , , Kalesh Anakkur Purayil , Jacob Keller , Stanislav Fomichev Subject: [PATCH net-next V2 1/4] net/mlx5e: Ensure each counter group uses its PCAM bit Date: Sun, 16 Mar 2025 10:14:33 +0200 Message-ID: <1742112876-2890-2-git-send-email-tariqt@nvidia.com> X-Mailer: git-send-email 2.8.0 In-Reply-To: <1742112876-2890-1-git-send-email-tariqt@nvidia.com> References: <1742112876-2890-1-git-send-email-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: AnonymousSubmission X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000EE30:EE_|CYYPR12MB8869:EE_ X-MS-Office365-Filtering-Correlation-Id: 2fb0e9c5-c547-4250-2658-08dd6462a230 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|1800799024|36860700013|376014|7416014; X-Microsoft-Antispam-Message-Info: JsF3m+SPr92qD9X5HkQUbUbWb94CADGJ+0TWEHHgMUY2cjvrQyWjFWkRnMiWVVLvQLNVRHOaxK/JW1lOshow0KMrKOrmEaDetYwjqp3asFgntgBSPKOY/Kqv9RyhIGzA2iLl/jodwZWi5fmnYOvdBixtHgvobD4c2Bvg5m6X7B3JsdbLjvyjSwz43HWVj7xX8ArR0OAigDpwrlEyrWGJ1EVVYCas4vTsJvrp8wn3mtDVICQkMhp75uhINN3w3BEMPtNB8j098AO+ofc6R9sHHyPOjnLrpM4/MMTCF56umyu6sVd3Ao3CmTuo9cUOv+ySCj0VokN0ST2d5plOpBLZueMlBSKscEui87yVct0yZFdU/mhY9IXAxWsS3SFM/5HklHMepYsrWP1HfqZF3bI3JOG8/CMwtW/tyZF9I/DWp/FpbwKp/ogNOxzHETHsJN+PpbPt958mwGzKz+cosk4WL1kEMXRJGxTLMQDFGmAe7Yh2SNm4n/39UujwHKLA9dgHG0mVtaTicZUF5ENjeaL0uK0e+3g3DAaDVmGmK1voj7EJl4xyPTJDb+Xg5t0U0bfv4EnRiufuhSU80kUrynCgNK2kMVo68E6EAVnq5gmUn/zpUdyyC52YH3FFqqIRrac15mrTpGGDTi8yJ1koNb7j3Nly05UF1kNMZarc0YCll/7JX8pG7Y6qUDEkB0hZ4xx7qd8Tm4GGw2FN7smy+YRzhRNagXGM/E1lnVACLHYgdvI+ETH6sL6Hi9IAg8hmjYW9+Nc/vEcMlPrNH4IH9esx05ukKoXLyrplaI6j2HY7uAxHhO+Buq+SAuywdVqX8ZqlqRirqm/wBYHEirh1L/DjQ7+4T58x6O6W36EZIn7ZjtzWZ6Gcbo+p4jLVmKXq8d9wWp6Df8hQckly3bGHCXY2uqC28XXg1T/AqrZdHGxGFTAkQ2LlzlL4BeA5duwMYE9Yr61T3Wpg12STCc5MqmC2pg0+pg/9cmhzQkdOxlBrsZPq74zEzQc1wKr39X0AWwoilmcLWJ9kuOEilmAzlAOLsdEemzj1KUf5lJrK0ukP/tKpsRFyF45eC7iTLz8OlxfONYkGoORVB8X/nhTorjxeDfpvrTlum9ixEM8YIrl+IAKB9/k+V0RcEOq++ZHWe827vRb/SwPQ164hz9AsqenTmpoSgXZg0Nq4GBdJUqEj8zQDRgXD5t/MDtMOYYLI8yiMCrOQVesDZ15ljILP6n5Drdl5fzU9z7UVUTdkuMALAlAXFzCS22rYtY8qcMcuFdSGNt4koIcojMmXofwRLrKPCBJIcYkN8rdV+dF1p0EmIHC7ZM4fU/V+OzIFeLL/NgraHTVT5MTKjam9YsRq+1sPZHsLytukX+omvXegohJKedBZMf8rHGz372j9CiiepGoLqyFXIrO9wbpiEdf2rwIzQaKluZE9KRc3uZ2QBIsq8ex9enZDbYsX9df6/rNsLGAZwdcC5zd32fpWzsQW1yIWqfaFuZccVO4kKOGZ+KYS2Fk= X-Forefront-Antispam-Report: CIP:216.228.118.232;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge1.nvidia.com;CAT:NONE;SFS:(13230040)(82310400026)(1800799024)(36860700013)(376014)(7416014);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Mar 2025 08:14:54.6334 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2fb0e9c5-c547-4250-2658-08dd6462a230 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.232];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EE30.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CYYPR12MB8869 X-Patchwork-Delegate: kuba@kernel.org From: Yael Chemla The code was incorrectly relying on PCAM bit of ppcnt_statistical_group for accessing per_lane_error_counters. If ppcnt_statistical_group PCAM bit was not set, we would not read per_lane_error_counters, even when its PCAM bit is set. Given the existing device capabilities, it seems to cause no harm, so this change primarily serves as cleanup. Signed-off-by: Yael Chemla Reviewed-by: Cosmin Ratiu Signed-off-by: Tariq Toukan Reviewed-by: Jacob Keller Reviewed-by: Kalesh AP --- .../ethernet/mellanox/mlx5/core/en_stats.c | 24 ++++++++----------- 1 file changed, 10 insertions(+), 14 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_stats.c b/drivers/net/ethernet/mellanox/mlx5/core/en_stats.c index 611ec4b6f370..77d34037b92b 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_stats.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_stats.c @@ -1272,11 +1272,9 @@ static MLX5E_DECLARE_STATS_GRP_OP_FILL_STRS(phy) ethtool_puts(data, "link_down_events_phy"); - if (!MLX5_CAP_PCAM_FEATURE(mdev, ppcnt_statistical_group)) - return; - - for (i = 0; i < NUM_PPORT_PHY_STATISTICAL_COUNTERS; i++) - ethtool_puts(data, pport_phy_statistical_stats_desc[i].format); + if (MLX5_CAP_PCAM_FEATURE(mdev, ppcnt_statistical_group)) + for (i = 0; i < NUM_PPORT_PHY_STATISTICAL_COUNTERS; i++) + ethtool_puts(data, pport_phy_statistical_stats_desc[i].format); if (MLX5_CAP_PCAM_FEATURE(mdev, per_lane_error_counters)) for (i = 0; i < NUM_PPORT_PHY_STATISTICAL_PER_LANE_COUNTERS; i++) @@ -1294,15 +1292,13 @@ static MLX5E_DECLARE_STATS_GRP_OP_FILL_STATS(phy) data, MLX5_GET(ppcnt_reg, priv->stats.pport.phy_counters, counter_set.phys_layer_cntrs.link_down_events)); - if (!MLX5_CAP_PCAM_FEATURE(mdev, ppcnt_statistical_group)) - return; - - for (i = 0; i < NUM_PPORT_PHY_STATISTICAL_COUNTERS; i++) - mlx5e_ethtool_put_stat( - data, - MLX5E_READ_CTR64_BE( - &priv->stats.pport.phy_statistical_counters, - pport_phy_statistical_stats_desc, i)); + if (MLX5_CAP_PCAM_FEATURE(mdev, ppcnt_statistical_group)) + for (i = 0; i < NUM_PPORT_PHY_STATISTICAL_COUNTERS; i++) + mlx5e_ethtool_put_stat( + data, + MLX5E_READ_CTR64_BE( + &priv->stats.pport.phy_statistical_counters, + pport_phy_statistical_stats_desc, i)); if (MLX5_CAP_PCAM_FEATURE(mdev, per_lane_error_counters)) for (i = 0; i < NUM_PPORT_PHY_STATISTICAL_PER_LANE_COUNTERS; i++)