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Miller" , Jakub Kicinski , Paolo Abeni , Eric Dumazet , "Andrew Lunn" CC: Gal Pressman , Leon Romanovsky , "Yael Chemla" , Saeed Mahameed , "Leon Romanovsky" , Tariq Toukan , "Jonathan Corbet" , , , , , Kalesh Anakkur Purayil , Jacob Keller , Stanislav Fomichev Subject: [PATCH net-next V2 3/4] net/mlx5e: Get counter group size by FW capability Date: Sun, 16 Mar 2025 10:14:35 +0200 Message-ID: <1742112876-2890-4-git-send-email-tariqt@nvidia.com> X-Mailer: git-send-email 2.8.0 In-Reply-To: <1742112876-2890-1-git-send-email-tariqt@nvidia.com> References: <1742112876-2890-1-git-send-email-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: AnonymousSubmission X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000EE33:EE_|MW3PR12MB4490:EE_ X-MS-Office365-Filtering-Correlation-Id: e88ec0c5-ef2a-4f91-ec24-08dd6462a7b5 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|82310400026|1800799024|7416014|376014; X-Microsoft-Antispam-Message-Info: dsbmcAVF/OkYm5JOprB/3Xi/Pzg1e9PGUOTYZM1BCkTkCVG+4RAVgEBPe4xytrwFunVDg92ByyVlHeiccfDipPS9e61bteicRRqmGs4nTVCC0gvSKe+ElZy6BB6aAGZ4Yj7+Z5qo4TRQs4L880p/6ZV7zJZj60fZfiG1lOnUMy4hzAaXjIknr849srj/ZfcKxl/qCYDFm0UA8JFlvzz9pLWi2kxDBmDQO7Qoubn+udTc6Q7NPptBPVfrYM5Seg9OTqQg/0CCEML/pxYP7ivz9KgsJmq6TmXVaOBEsUO3bEf++kwhhpJUnXiNpMItWmmdjhOnQ35AbkBddBv4iRebILwalsIPnfQePWM861HLykxf09san8FDwDwYhc85ePuz+zj3mhj/2s1eGJ895gx8DHifkcaaJCI+AOGkmI+jj9lAyyjiHvLo+2trl03nbPq7Z8dE0FEV44My/Ix4FWgW55fSOOenngNOZlBup2xlfyVGpd1X+wTh5RrkX7kzOXg8JenvxfbIdc3uj70YLfwDZAlCyl4nuLUuOn3Z5lpXRWDHRqmQZ2Cu7Qla0uYtfFO2RirZwexrA2T+jy7V/4jLmMNVuOB33+ln+xzS9GIsbF0OMM+BuV3LMISGA+oEC9iRpgbOwCiLDH6L2we3JDVXxwudMRzdpEiNHuVZ9eHbmqkRR7c2YCOKs7poSO5jvqJrDP1ZbSuLKsh+JKU6n9RLPDhZ7XcCBC0ZpVWqmz8y5z4F3i1RyH+6BshCcptBS/dGI8UREGsOqZbAr3cIrP+wbH6Xdq26w1n6mbdDxCLGHRvv+Tpjkn12g5+/+oDynzf9PSXPGTxcEoUxVSgt6PR81AxNOlEuUflEgjB8/rgdVnCR2z5n6ennzdI4M7zW8RSM5wqqPP1lEeEwW+FPiWCnYyBkhvtf3YRQWq9kaXATYWx60DEbTjGjpBNHDin346VGY4cCVfG4+ycXvjSf+9lv+k5AT/AHZyVQzbrudiIIFSb1IPlQhAIB9h7t1CdRj9vNyyOaUE5n+3qfhnMfcXCeGugtyul7RO1qVK6psQO5kroUP5NJDw3mL1LtIq+iJsUcBnkvcessHJ3QwvV0sjbQQyKPeQypAbMiRvXcMbSnSLKH3Nhn5Y6Hp8LJSpniV7DuUJbNBfjzboa3eC8uk22gqMaZGzxhqKMvrnbC0SWPlO7cgSUEzxZhcUxUxf1JNtoICDYP1QvlPQrYwh6fKFFZcvy9TICiSHgzjWmXoKd09MhHvm8OnAFhREVdsUJKz4PoRKItWQ+eqbWbnmf3CTfcsaWn7FYNL9nR5lGYPv03Jxe/lULBRka9YCYSxyMo+fBYCGhjX7FHWSt+2EQmwucngMOEgqLH8Vc2KGwQaEuUizfh0SQ2Ueh6qrAtZb26j9ITumX2U6WBwsXU/fzyEXDQSCVi+JBqg4g7ja411+BhJy7b5t6v8cda1cuTYTMrw7N4ZgpViwX5VPcY77I6zB1Jvkm1l09yChn08ylnmozKRCg= X-Forefront-Antispam-Report: CIP:216.228.118.232;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge1.nvidia.com;CAT:NONE;SFS:(13230040)(36860700013)(82310400026)(1800799024)(7416014)(376014);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Mar 2025 08:15:03.8831 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e88ec0c5-ef2a-4f91-ec24-08dd6462a7b5 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.232];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EE33.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW3PR12MB4490 X-Patchwork-Delegate: kuba@kernel.org From: Yael Chemla Retrieve the number of fields supported by each PPCNT counter group based on the FW capability for this group. Signed-off-by: Yael Chemla Signed-off-by: Tariq Toukan Reviewed-by: Jacob Keller Reviewed-by: Kalesh AP --- .../ethernet/mellanox/mlx5/core/en_stats.c | 58 ++++++++++--------- 1 file changed, 31 insertions(+), 27 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_stats.c b/drivers/net/ethernet/mellanox/mlx5/core/en_stats.c index 0cf0c920532f..a417962acfa9 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_stats.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_stats.c @@ -1257,6 +1257,13 @@ pport_phy_statistical_err_lanes_stats_desc[] = { #define NUM_PPORT_PHY_STATISTICAL_PER_LANE_COUNTERS \ ARRAY_SIZE(pport_phy_statistical_err_lanes_stats_desc) +#define NUM_PPORT_PHY_STATISTICAL_LOOPBACK_COUNTERS(dev) \ + (MLX5_CAP_PCAM_FEATURE(dev, ppcnt_statistical_group) ? \ + NUM_PPORT_PHY_STATISTICAL_COUNTERS : 0) +#define NUM_PPORT_PHY_STATISTICAL_PER_LANE_LOOPBACK_COUNTERS(dev) \ + (MLX5_CAP_PCAM_FEATURE(dev, per_lane_error_counters) ? \ + NUM_PPORT_PHY_STATISTICAL_PER_LANE_COUNTERS : 0) + static MLX5E_DECLARE_STATS_GRP_OP_NUM_STATS(phy) { struct mlx5_core_dev *mdev = priv->mdev; @@ -1264,11 +1271,9 @@ static MLX5E_DECLARE_STATS_GRP_OP_NUM_STATS(phy) num_stats = NUM_PPORT_PHY_LAYER_COUNTERS; - num_stats += MLX5_CAP_PCAM_FEATURE(mdev, ppcnt_statistical_group) ? - NUM_PPORT_PHY_STATISTICAL_COUNTERS : 0; + num_stats += NUM_PPORT_PHY_STATISTICAL_LOOPBACK_COUNTERS(mdev); - num_stats += MLX5_CAP_PCAM_FEATURE(mdev, per_lane_error_counters) ? - NUM_PPORT_PHY_STATISTICAL_PER_LANE_COUNTERS : 0; + num_stats += NUM_PPORT_PHY_STATISTICAL_PER_LANE_LOOPBACK_COUNTERS(mdev); return num_stats; } @@ -1281,14 +1286,15 @@ static MLX5E_DECLARE_STATS_GRP_OP_FILL_STRS(phy) for (i = 0; i < NUM_PPORT_PHY_LAYER_COUNTERS; i++) ethtool_puts(data, pport_phy_layer_cntrs_stats_desc[i].format); - if (MLX5_CAP_PCAM_FEATURE(mdev, ppcnt_statistical_group)) - for (i = 0; i < NUM_PPORT_PHY_STATISTICAL_COUNTERS; i++) - ethtool_puts(data, pport_phy_statistical_stats_desc[i].format); + for (i = 0; i < NUM_PPORT_PHY_STATISTICAL_LOOPBACK_COUNTERS(mdev); i++) + ethtool_puts(data, pport_phy_statistical_stats_desc[i].format); - if (MLX5_CAP_PCAM_FEATURE(mdev, per_lane_error_counters)) - for (i = 0; i < NUM_PPORT_PHY_STATISTICAL_PER_LANE_COUNTERS; i++) - ethtool_puts(data, - pport_phy_statistical_err_lanes_stats_desc[i].format); + for (i = 0; + i < NUM_PPORT_PHY_STATISTICAL_PER_LANE_LOOPBACK_COUNTERS(mdev); + i++) + ethtool_puts(data, + pport_phy_statistical_err_lanes_stats_desc[i] + .format); } static MLX5E_DECLARE_STATS_GRP_OP_FILL_STATS(phy) @@ -1303,23 +1309,21 @@ static MLX5E_DECLARE_STATS_GRP_OP_FILL_STATS(phy) .phy_counters, pport_phy_layer_cntrs_stats_desc, i)); - if (MLX5_CAP_PCAM_FEATURE(mdev, ppcnt_statistical_group)) - for (i = 0; i < NUM_PPORT_PHY_STATISTICAL_COUNTERS; i++) - mlx5e_ethtool_put_stat( - data, - MLX5E_READ_CTR64_BE( - &priv->stats.pport.phy_statistical_counters, - pport_phy_statistical_stats_desc, i)); + for (i = 0; i < NUM_PPORT_PHY_STATISTICAL_LOOPBACK_COUNTERS(mdev); i++) + mlx5e_ethtool_put_stat( + data, + MLX5E_READ_CTR64_BE( + &priv->stats.pport.phy_statistical_counters, + pport_phy_statistical_stats_desc, i)); - if (MLX5_CAP_PCAM_FEATURE(mdev, per_lane_error_counters)) - for (i = 0; i < NUM_PPORT_PHY_STATISTICAL_PER_LANE_COUNTERS; i++) - mlx5e_ethtool_put_stat( - data, - MLX5E_READ_CTR64_BE( - &priv->stats.pport - .phy_statistical_counters, - pport_phy_statistical_err_lanes_stats_desc, - i)); + for (i = 0; + i < NUM_PPORT_PHY_STATISTICAL_PER_LANE_LOOPBACK_COUNTERS(mdev); + i++) + mlx5e_ethtool_put_stat( + data, + MLX5E_READ_CTR64_BE( + &priv->stats.pport.phy_statistical_counters, + pport_phy_statistical_err_lanes_stats_desc, i)); } static MLX5E_DECLARE_STATS_GRP_OP_UPDATE_STATS(phy)