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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Andrew Lunn , CC: Amit Cohen , Ido Schimmel , "Petr Machata" , Alexei Starovoitov , "Daniel Borkmann" , Jesper Dangaard Brouer , John Fastabend , , Subject: [PATCH net-next 06/12] mlxsw: pci: Store maximum number of ports Date: Tue, 4 Feb 2025 12:05:01 +0100 Message-ID: <1ae1ff81fcf24324e0371ba983bfbf121f923523.1738665783.git.petrm@nvidia.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: bpf@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: rnnvmail203.nvidia.com (10.129.68.9) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH3PEPF0000000B:EE_|DS7PR12MB6312:EE_ X-MS-Office365-Filtering-Correlation-Id: 17a97c71-726d-4c01-1bf4-08dd450c0dd0 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|7416014|82310400026|36860700013|1800799024; X-Microsoft-Antispam-Message-Info: 0Rps/n7+bFovjMWRMwFrRyswOcnijp5lDG17PR4DEQPc5E0s6cDkAMMCbyZN4SJlRwkt9nMokdSgn7k80/Lib+fK2MtYF4hNdsjQk0R2YktI7uti/1+JmPt+BqRUmopEm8w0ATzX6R2kWYYfOYOAMbI+2PvfwLyXk2AswhHVOwJz2GyWc2NdP8oLooCc+OSEm0b3L8ruyoMW/s7RIKs23aIHwBh4+Kr0/H09eQsCJVslZN9gegLBUvymrhD0UU8c3KPLTUiaDYTsqb/Lu1ALmdhR9NXMTM8KCxO+gzqVetQIqm/lF1x0BLb8YMCNrzy2aiPLb6KWrPhyJqMzf5oOncMWdL8fyiMpyvSd3wfK04+gKQvk6Rb2dl26APDnWZGCPy5QwHLH9J8v/qiLLsEM9NNe5AqZUnS4c1XJiD/xQOBVJWkTbaC5kpr/HUiO+UJ/sAal0r1PaW25uQsWhCGRqqS7dn1M+WHgKJ4DV+2TOkVZVAPuHz89bu4GpnxwaNNhqYsufqrlLB8P5psXuCRLQeRrDWP2MnOGBPpiqTIJct8ZYGM93S8xWcHT+KNc/xEWp/kin7QXi5xPd0ComLC2SBNCeR+UgkZnpySfL3zZ0yfLRRhTqp0+otZlvmYwJecf0r2Btnyzf6fwym9g1BpnUgedr9MQbyC4Y8nztaG2GruM7hxaMX4EoqU05Lgm3WvJOKDeT0bBp/K1qfEmE000LiZr5XOvFc7tjJyjZaPPEEsvXHAC/KK2j6ZXriZUm7Exn2LZ7ExackpU+fs9w/Bbgb2MFYpNwYuy/IBuMm79mONT4a1wAWSIQR2rABKfGhHemxpwG+a00wGlY/72wEHbI/m5ypjkhcEV6SvicOPHJa42C3At259c/K4v4HV7m14Y0jI7KadycccK+7AauU6TlwRxiMwEBWwqTEZqQ72bKVF3kTATI3rMsmiVAsVF7EEhrSeZcYdPGj60zVF5MoW/hiJZ1rimivOUKWfePup5p+orgB2tgAbtxF0VngathJXJYgvlC8YeivlEpbhO8kIazH4Zm9fkWjf4OcgSm7vHP2LBydK5ZPc0kBOS8/WhTkr7M7wCKiwH2U1nZmET53Dcj2ZJFmc6r2TUG0FFjxFxB8ZecGU2N6P7oYCc1GFApe3CWOe0j6OljqFbLF0NnhFKxCFzlyHW6CuegxfLdFcPhW78X7sAIShPtqjpgUAVY9aG1fyuOqAbj5wM/HORmse6ZYZsSdk/GqMaxCM/zYN5gHSRSdySfNJ66+fVnfTMTIYZMLH9L6du3auP6eeiJEk7g/2KODCSyc9ufi8aITaF1/K7PSeXFw9xERNppvoetqNIDGqLwnYYna0XIyE63qppjC6QXunp8RFHCLWB24rHnNoXngXNpHtyuyhZW/aAgbbGtt/LJocNu5bJB80YorsCpPePlzsf741lJNgyA+BtTre7CM1YBqtNUypmFuIMWJCpiYg6ysIWHOVIm8Y7ukbmmJeLUdkjohi0HA7/nlFV11Q= X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(376014)(7416014)(82310400026)(36860700013)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Feb 2025 11:07:02.8582 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 17a97c71-726d-4c01-1bf4-08dd450c0dd0 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CH3PEPF0000000B.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB6312 X-Patchwork-Delegate: kuba@kernel.org From: Amit Cohen A next patch will store mapping between local port to netdevice in PCI driver. The motivation is to allow quick access to XDP program. When a packet is received, the Rx local port is known, to run XDP program we need to map Rx local port to netdevice, as XDP program is set per netdevice. As preparation, store the maximum number of ports as part of mlxsw_pci structure, this value is queried from firmware. Signed-off-by: Amit Cohen Reviewed-by: Ido Schimmel Signed-off-by: Petr Machata --- drivers/net/ethernet/mellanox/mlxsw/pci.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/net/ethernet/mellanox/mlxsw/pci.c b/drivers/net/ethernet/mellanox/mlxsw/pci.c index 5796d836a7ee..8af4050d5fc6 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/pci.c +++ b/drivers/net/ethernet/mellanox/mlxsw/pci.c @@ -137,6 +137,7 @@ struct mlxsw_pci { bool skip_reset; struct net_device *napi_dev_tx; struct net_device *napi_dev_rx; + unsigned int max_ports; }; static int mlxsw_pci_napi_devs_init(struct mlxsw_pci *mlxsw_pci) @@ -171,6 +172,20 @@ static void mlxsw_pci_napi_devs_fini(struct mlxsw_pci *mlxsw_pci) free_netdev(mlxsw_pci->napi_dev_tx); } +static int mlxsw_pci_max_ports_set(struct mlxsw_pci *mlxsw_pci) +{ + struct mlxsw_core *mlxsw_core = mlxsw_pci->core; + unsigned int max_ports; + + if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_SYSTEM_PORT)) + return -EINVAL; + + /* Switch ports are numbered from 1 to queried value */ + max_ports = MLXSW_CORE_RES_GET(mlxsw_core, MAX_SYSTEM_PORT) + 1; + mlxsw_pci->max_ports = max_ports; + return 0; +} + static char *__mlxsw_pci_queue_elem_get(struct mlxsw_pci_queue *q, size_t elem_size, int elem_index) { @@ -2069,6 +2084,10 @@ static int mlxsw_pci_init(void *bus_priv, struct mlxsw_core *mlxsw_core, if (err) goto err_napi_devs_init; + err = mlxsw_pci_max_ports_set(mlxsw_pci); + if (err) + goto err_max_ports_set; + err = mlxsw_pci_aqs_init(mlxsw_pci, mbox); if (err) goto err_aqs_init; @@ -2086,6 +2105,7 @@ static int mlxsw_pci_init(void *bus_priv, struct mlxsw_core *mlxsw_core, err_request_eq_irq: mlxsw_pci_aqs_fini(mlxsw_pci); err_aqs_init: +err_max_ports_set: mlxsw_pci_napi_devs_fini(mlxsw_pci); err_napi_devs_init: err_requery_resources: