From patchwork Fri Dec 11 09:05:41 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Steen Hegelund X-Patchwork-Id: 11967747 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D6991C2BB9A for ; Fri, 11 Dec 2020 09:08:33 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A4C6F23F38 for ; Fri, 11 Dec 2020 09:08:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2437363AbgLKJHs (ORCPT ); Fri, 11 Dec 2020 04:07:48 -0500 Received: from esa.microchip.iphmx.com ([68.232.154.123]:56619 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2437282AbgLKJHZ (ORCPT ); Fri, 11 Dec 2020 04:07:25 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1607677645; x=1639213645; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=HYvqfDOJAQzsbDFrol1vkz2s/fsDFmkTjeSVK52uWyE=; b=qDrGXeD0bZyVWW1ys/dFbxjk6N5DeA4zyaCvzJQLEbJRzZfwZjQjqaOX zqJMdhzAEVjM7RRFAJ+EmqW2CEEzJuI5Yse3UlelMKWEZAOjRgEVoajd8 dnxL5jnlxSenf4kOYOC3oaFq+TlCn6tVo+wM6IuZzDb5YzJq11GNFHLV0 V6ldJT9zzbctzDj5i0pKaKgx2Hy127r5lr/ehaqxWQbZQ3lEMa8fHnVx9 Colp5bS4rgsNpZU34wivDQ80uZrpM+RyJRkJ5bVne6U3l+Bj0I7i4UGqx gsqOvRUERIFiYPKxLkw/hjw/KOaEJLx59huD60Ez6swwknoJLi5ojVK2K A==; IronPort-SDR: zExYFzteI6nza7LKzwnjn7xQqO2+xKBxXc0Y2wmz+e18mkvyh08CI6zbKhCVo5u19YgryNg//M yZTPblmedXCZ1Nffm0O+SWwvAM4W6iBMYXHBEJTdjRxDUP+wFxCle3PMvG3Q2dwZV7++/FF/jl pdYWdTGxIQ1juiQIdkW6GnuSlOrsiQXC4ke6rjJ3cVVkLc/uGNgdTOUhThTKrl7YLNBPTukF7R 3/9Py6iMQL//kwsj9chnJz221IAert2F+O7G3wTcZI/s1ABCj1c6tTuGQKLJbQPdWL3Qousxxf 1vI= X-IronPort-AV: E=Sophos;i="5.78,410,1599548400"; d="scan'208";a="99484087" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa2.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 11 Dec 2020 02:06:05 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Fri, 11 Dec 2020 02:06:04 -0700 Received: from mchp-dev-shegelun.microchip.com (10.10.115.15) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.1979.3 via Frontend Transport; Fri, 11 Dec 2020 02:06:02 -0700 From: Steen Hegelund To: Kishon Vijay Abraham I , Vinod Koul CC: Steen Hegelund , Alexandre Belloni , Lars Povlsen , Bjarni Jonasson , Microchip UNG Driver List , , Subject: [PATCH v10 4/4] arm64: dts: sparx5: Add Sparx5 serdes driver node Date: Fri, 11 Dec 2020 10:05:41 +0100 Message-ID: <20201211090541.157926-5-steen.hegelund@microchip.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201211090541.157926-1-steen.hegelund@microchip.com> References: <20201211090541.157926-1-steen.hegelund@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Add Sparx5 serdes driver node, and enable it generally for all reference boards. Signed-off-by: Lars Povlsen Signed-off-by: Steen Hegelund Reviewed-by: Andrew Lunn --- arch/arm64/boot/dts/microchip/sparx5.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/microchip/sparx5.dtsi b/arch/arm64/boot/dts/microchip/sparx5.dtsi index 8e7724d413fb..797601a9d542 100644 --- a/arch/arm64/boot/dts/microchip/sparx5.dtsi +++ b/arch/arm64/boot/dts/microchip/sparx5.dtsi @@ -287,5 +287,13 @@ tmon0: tmon@610508110 { #thermal-sensor-cells = <0>; clocks = <&ahb_clk>; }; + + serdes: serdes@10808000 { + compatible = "microchip,sparx5-serdes"; + #phy-cells = <1>; + clocks = <&sys_clk>; + reg = <0x6 0x10808000 0x5d0000>; + }; + }; };