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Sun, 10 Jan 2021 04:15:51 -0800 (PST) From: Aditya Srivastava To: linux-wireless@vger.kernel.org Cc: pkshih@realtek.com, kvalo@codeaurora.org, davem@davemloft.net, kuba@kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-kernel-mentees@lists.linuxfoundation.org, lukas.bulwahn@gmail.com, yashsri421@gmail.com Subject: [PATCH 4/5] rtlwifi: rtl8192se: fix bool comparison in expressions Date: Sun, 10 Jan 2021 17:45:24 +0530 Message-Id: <20210110121525.2407-5-yashsri421@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210110121525.2407-1-yashsri421@gmail.com> References: <3c121981-1468-fc9d-7813-483246066cc4@lwfinger.net> <20210110121525.2407-1-yashsri421@gmail.com> Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org There are certain conditional expressions in rtl8192se, where a boolean variable is compared with true/false, in forms such as (foo == true) or (false != bar), which does not comply with checkpatch.pl (CHECK: BOOL_COMPARISON), according to which boolean variables should be themselves used in the condition, rather than comparing with true/false Replace all such expressions with the bool variables appropriately Signed-off-by: Aditya Srivastava --- drivers/net/wireless/realtek/rtlwifi/rtl8192se/hw.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/wireless/realtek/rtlwifi/rtl8192se/hw.c b/drivers/net/wireless/realtek/rtlwifi/rtl8192se/hw.c index 47fabce5c235..73a5d8a068fc 100644 --- a/drivers/net/wireless/realtek/rtlwifi/rtl8192se/hw.c +++ b/drivers/net/wireless/realtek/rtlwifi/rtl8192se/hw.c @@ -458,7 +458,7 @@ static u8 _rtl92se_halset_sysclk(struct ieee80211_hw *hw, u8 data) tmpvalue = rtl_read_byte(rtlpriv, SYS_CLKR + 1); bresult = ((tmpvalue & BIT(7)) == (data & BIT(7))); - if ((data & (BIT(6) | BIT(7))) == false) { + if (!(data & (BIT(6) | BIT(7)))) { waitcount = 100; tmpvalue = 0; @@ -1268,7 +1268,7 @@ static u8 _rtl92s_set_sysclk(struct ieee80211_hw *hw, u8 data) tmp = rtl_read_byte(rtlpriv, SYS_CLKR + 1); result = ((tmp & BIT(7)) == (data & BIT(7))); - if ((data & (BIT(6) | BIT(7))) == false) { + if (!(data & (BIT(6) | BIT(7)))) { waitcnt = 100; tmp = 0;