| Message ID | 20210113152007.30293-2-schalla@marvell.com (mailing list archive) |
|---|---|
| State | Changes Requested |
| Delegated to: | Netdev Maintainers |
| Headers | show |
| Series | Support for OcteonTX2 98xx CPT block. | expand |
| Context | Check | Description |
|---|---|---|
| netdev/cover_letter | success | Link |
| netdev/fixes_present | success | Link |
| netdev/patch_count | success | Link |
| netdev/tree_selection | success | Clearly marked for net-next |
| netdev/subject_prefix | success | Link |
| netdev/cc_maintainers | warning | 1 maintainers not CCed: lcherian@marvell.com |
| netdev/source_inline | success | Was 0 now: 0 |
| netdev/verify_signedoff | success | Link |
| netdev/module_param | success | Was 0 now: 0 |
| netdev/build_32bit | success | Errors and warnings before: 0 this patch: 0 |
| netdev/kdoc | success | Errors and warnings before: 0 this patch: 0 |
| netdev/verify_fixes | success | Link |
| netdev/checkpatch | success | total: 0 errors, 0 warnings, 0 checks, 90 lines checked |
| netdev/build_allmodconfig_warn | success | Errors and warnings before: 17 this patch: 17 |
| netdev/header_inline | success | Link |
| netdev/stable | success | Stable not CCed |
On Wed, 2021-01-13 at 20:50 +0530, Srujana Challa wrote: > This patch changes CPT mailbox message format to > support new block CPT1 in 98xx silicon. > > cpt_rd_wr_reg -> > Modify cpt_rd_wr_reg mailbox and its handler to > accommodate new block CPT1. > cpt_lf_alloc -> > Modify cpt_lf_alloc mailbox and its handler to > configure LFs from a block address out of multiple > blocks of same type. If a PF/VF needs to configure > LFs from both the blocks then this mbox should be > called twice. > > Signed-off-by: Mahipal Challa <mchalla@marvell.com> > Signed-off-by: Srujana Challa <schalla@marvell.com> > --- > .../net/ethernet/marvell/octeontx2/af/mbox.h | 2 + > .../ethernet/marvell/octeontx2/af/rvu_cpt.c | 41 +++++++++++---- > ---- > 2 files changed, 27 insertions(+), 16 deletions(-) > > diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h > b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h > index f919283ddc34..cbbab070f22b 100644 > --- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h > +++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h > @@ -1071,6 +1071,7 @@ struct cpt_rd_wr_reg_msg { > u64 *ret_val; > u64 val; > u8 is_write; > + int blkaddr; > }; > > struct cpt_lf_alloc_req_msg { > @@ -1078,6 +1079,7 @@ struct cpt_lf_alloc_req_msg { > u16 nix_pf_func; > u16 sso_pf_func; > u16 eng_grpmsk; > + int blkaddr; > }; > > #endif /* MBOX_H */ > diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c > b/drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c > index 35261d52c997..b6de4b95a72a 100644 > --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c > +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c > @@ -65,13 +65,13 @@ int rvu_mbox_handler_cpt_lf_alloc(struct rvu > *rvu, > int num_lfs, slot; > u64 val; > > + blkaddr = req->blkaddr ? req->blkaddr : BLKADDR_CPT0; > + if (blkaddr != BLKADDR_CPT0 && blkaddr != BLKADDR_CPT1) > + return -ENODEV; > + > Just out of curiosity, why do you need to check against your driver's internals function calls ? who calls this function: I Couldn't find any caller ! $ git grep rvu_mbox_handler_cpt_lf_alloc drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c:int rvu_mbox_handler_cpt_lf_alloc(struct rvu *rvu,
> On Wed, 2021-01-13 at 20:50 +0530, Srujana Challa wrote: > > This patch changes CPT mailbox message format to support new block > > CPT1 in 98xx silicon. > > > > cpt_rd_wr_reg -> > > Modify cpt_rd_wr_reg mailbox and its handler to > > accommodate new block CPT1. > > cpt_lf_alloc -> > > Modify cpt_lf_alloc mailbox and its handler to > > configure LFs from a block address out of multiple > > blocks of same type. If a PF/VF needs to configure > > LFs from both the blocks then this mbox should be > > called twice. > > > > Signed-off-by: Mahipal Challa <mchalla@marvell.com> > > Signed-off-by: Srujana Challa <schalla@marvell.com> > > --- > > .../net/ethernet/marvell/octeontx2/af/mbox.h | 2 + > > .../ethernet/marvell/octeontx2/af/rvu_cpt.c | 41 +++++++++++---- > > ---- > > 2 files changed, 27 insertions(+), 16 deletions(-) > > > > diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h > > b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h > > index f919283ddc34..cbbab070f22b 100644 > > --- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h > > +++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h > > @@ -1071,6 +1071,7 @@ struct cpt_rd_wr_reg_msg { > > u64 *ret_val; > > u64 val; > > u8 is_write; > > + int blkaddr; > > }; > > > > struct cpt_lf_alloc_req_msg { > > @@ -1078,6 +1079,7 @@ struct cpt_lf_alloc_req_msg { > > u16 nix_pf_func; > > u16 sso_pf_func; > > u16 eng_grpmsk; > > + int blkaddr; > > }; > > > > #endif /* MBOX_H */ > > diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c > > b/drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c > > index 35261d52c997..b6de4b95a72a 100644 > > --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c > > +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c > > @@ -65,13 +65,13 @@ int rvu_mbox_handler_cpt_lf_alloc(struct rvu *rvu, > > int num_lfs, slot; > > u64 val; > > > > + blkaddr = req->blkaddr ? req->blkaddr : BLKADDR_CPT0; > > + if (blkaddr != BLKADDR_CPT0 && blkaddr != BLKADDR_CPT1) > > + return -ENODEV; > > + > > > > Just out of curiosity, why do you need to check against your driver's internals > function calls ? > > who calls this function: I Couldn't find any caller ! > This function is a mailbox handler, it will be triggered when Marvell crypto(CPT) driver sends a CPT_LF_ALLOC mailbox message. I have added check for blkaddr because there is a chance for sending invalid blkaddr through mailbox request from CPT VF drivers. > $ git grep rvu_mbox_handler_cpt_lf_alloc > drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c:int > rvu_mbox_handler_cpt_lf_alloc(struct rvu *rvu, > >
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h index f919283ddc34..cbbab070f22b 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h +++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h @@ -1071,6 +1071,7 @@ struct cpt_rd_wr_reg_msg { u64 *ret_val; u64 val; u8 is_write; + int blkaddr; }; struct cpt_lf_alloc_req_msg { @@ -1078,6 +1079,7 @@ struct cpt_lf_alloc_req_msg { u16 nix_pf_func; u16 sso_pf_func; u16 eng_grpmsk; + int blkaddr; }; #endif /* MBOX_H */ diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c index 35261d52c997..b6de4b95a72a 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c @@ -65,13 +65,13 @@ int rvu_mbox_handler_cpt_lf_alloc(struct rvu *rvu, int num_lfs, slot; u64 val; + blkaddr = req->blkaddr ? req->blkaddr : BLKADDR_CPT0; + if (blkaddr != BLKADDR_CPT0 && blkaddr != BLKADDR_CPT1) + return -ENODEV; + if (req->eng_grpmsk == 0x0) return CPT_AF_ERR_GRP_INVALID; - blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_CPT, 0); - if (blkaddr < 0) - return blkaddr; - block = &rvu->hw->block[blkaddr]; num_lfs = rvu_get_rsrc_mapcount(rvu_get_pfvf(rvu, pcifunc), block->addr); @@ -114,23 +114,17 @@ int rvu_mbox_handler_cpt_lf_alloc(struct rvu *rvu, return 0; } -int rvu_mbox_handler_cpt_lf_free(struct rvu *rvu, struct msg_req *req, - struct msg_rsp *rsp) +static int cpt_lf_free(struct rvu *rvu, struct msg_req *req, int blkaddr) { u16 pcifunc = req->hdr.pcifunc; + int num_lfs, cptlf, slot; struct rvu_block *block; - int cptlf, blkaddr; - int num_lfs, slot; - - blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_CPT, 0); - if (blkaddr < 0) - return blkaddr; block = &rvu->hw->block[blkaddr]; num_lfs = rvu_get_rsrc_mapcount(rvu_get_pfvf(rvu, pcifunc), block->addr); if (!num_lfs) - return CPT_AF_ERR_LF_INVALID; + return 0; for (slot = 0; slot < num_lfs; slot++) { cptlf = rvu_get_lf(rvu, block, pcifunc, slot); @@ -146,6 +140,21 @@ int rvu_mbox_handler_cpt_lf_free(struct rvu *rvu, struct msg_req *req, return 0; } +int rvu_mbox_handler_cpt_lf_free(struct rvu *rvu, struct msg_req *req, + struct msg_rsp *rsp) +{ + int ret; + + ret = cpt_lf_free(rvu, req, BLKADDR_CPT0); + if (ret) + return ret; + + if (is_block_implemented(rvu->hw, BLKADDR_CPT1)) + ret = cpt_lf_free(rvu, req, BLKADDR_CPT1); + + return ret; +} + static bool is_valid_offset(struct rvu *rvu, struct cpt_rd_wr_reg_msg *req) { u64 offset = req->reg_offset; @@ -208,9 +217,9 @@ int rvu_mbox_handler_cpt_rd_wr_register(struct rvu *rvu, { int blkaddr; - blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_CPT, 0); - if (blkaddr < 0) - return blkaddr; + blkaddr = req->blkaddr ? req->blkaddr : BLKADDR_CPT0; + if (blkaddr != BLKADDR_CPT0 && blkaddr != BLKADDR_CPT1) + return -ENODEV; /* This message is accepted only if sent from CPT PF/VF */ if (!is_cpt_pf(rvu, req->hdr.pcifunc) &&
This patch changes CPT mailbox message format to support new block CPT1 in 98xx silicon. cpt_rd_wr_reg -> Modify cpt_rd_wr_reg mailbox and its handler to accommodate new block CPT1. cpt_lf_alloc -> Modify cpt_lf_alloc mailbox and its handler to configure LFs from a block address out of multiple blocks of same type. If a PF/VF needs to configure LFs from both the blocks then this mbox should be called twice. Signed-off-by: Mahipal Challa <mchalla@marvell.com> Signed-off-by: Srujana Challa <schalla@marvell.com> --- .../net/ethernet/marvell/octeontx2/af/mbox.h | 2 + .../ethernet/marvell/octeontx2/af/rvu_cpt.c | 41 +++++++++++-------- 2 files changed, 27 insertions(+), 16 deletions(-)