diff mbox series

[bpf-next,v3,1/2] docs: bpf: Fixup atomics markup

Message ID 20210120133946.2107897-2-jackmanb@google.com (mailing list archive)
State Accepted
Delegated to: BPF
Headers show
Series BPF docs fixups | expand

Checks

Context Check Description
netdev/apply success Patch already applied to bpf-next
netdev/tree_selection success Clearly marked for bpf-next

Commit Message

Brendan Jackman Jan. 20, 2021, 1:39 p.m. UTC 
This fixes up the markup to fix a warning, be more consistent with
use of monospace, and use the correct .rst syntax for <em> (* instead
of _).

Signed-off-by: Brendan Jackman <jackmanb@google.com>
Reviewed-by: Lukas Bulwahn <lukas.bulwahn@gmail.com>

---
 Documentation/networking/filter.rst | 15 ++++++++-------
 1 file changed, 8 insertions(+), 7 deletions(-)

--
2.30.0.284.gd98b1dd5eaa7-goog
diff mbox series

Patch

diff --git a/Documentation/networking/filter.rst b/Documentation/networking/filter.rst
index 45f6fde1776c..4c2bb4c6364d 100644
--- a/Documentation/networking/filter.rst
+++ b/Documentation/networking/filter.rst
@@ -1066,12 +1066,12 @@  memory location addresed by ``dst_reg + off`` is atomically modified, with
 immediate, then these operations also overwrite ``src_reg`` with the
 value that was in memory before it was modified.

-The more special operations are:
+The more special operations are::

     BPF_XCHG

 This atomically exchanges ``src_reg`` with the value addressed by ``dst_reg +
-off``.
+off``. ::

     BPF_CMPXCHG

@@ -1081,18 +1081,19 @@  before is loaded back to ``R0``.

 Note that 1 and 2 byte atomic operations are not supported.

-Except ``BPF_ADD`` _without_ ``BPF_FETCH`` (for legacy reasons), all 4 byte
+Except ``BPF_ADD`` *without* ``BPF_FETCH`` (for legacy reasons), all 4 byte
 atomic operations require alu32 mode. Clang enables this mode by default in
 architecture v3 (``-mcpu=v3``). For older versions it can be enabled with
 ``-Xclang -target-feature -Xclang +alu32``.

-You may encounter BPF_XADD - this is a legacy name for BPF_ATOMIC, referring to
-the exclusive-add operation encoded when the immediate field is zero.
+You may encounter ``BPF_XADD`` - this is a legacy name for ``BPF_ATOMIC``,
+referring to the exclusive-add operation encoded when the immediate field is
+zero.

-eBPF has one 16-byte instruction: BPF_LD | BPF_DW | BPF_IMM which consists
+eBPF has one 16-byte instruction: ``BPF_LD | BPF_DW | BPF_IMM`` which consists
 of two consecutive ``struct bpf_insn`` 8-byte blocks and interpreted as single
 instruction that loads 64-bit immediate value into a dst_reg.
-Classic BPF has similar instruction: BPF_LD | BPF_W | BPF_IMM which loads
+Classic BPF has similar instruction: ``BPF_LD | BPF_W | BPF_IMM`` which loads
 32-bit immediate value into a register.

 eBPF verifier