diff mbox series

[net-next,4/8] net: dsa: microchip: add support for phylink management

Message ID 20210128064112.372883-5-prasanna.vengateshan@microchip.com (mailing list archive)
State Changes Requested
Delegated to: Netdev Maintainers
Headers show
Series net: dsa: microchip: DSA driver support for LAN937x switch | expand

Checks

Context Check Description
netdev/cover_letter success Link
netdev/fixes_present success Link
netdev/patch_count success Link
netdev/tree_selection success Clearly marked for net-next
netdev/subject_prefix success Link
netdev/cc_maintainers warning 2 maintainers not CCed: linux@armlinux.org.uk woojung.huh@microchip.com
netdev/source_inline success Was 0 now: 0
netdev/verify_signedoff success Link
netdev/module_param success Was 0 now: 0
netdev/build_32bit success Errors and warnings before: 0 this patch: 0
netdev/kdoc success Errors and warnings before: 0 this patch: 0
netdev/verify_fixes success Link
netdev/checkpatch success total: 0 errors, 0 warnings, 0 checks, 52 lines checked
netdev/build_allmodconfig_warn success Errors and warnings before: 0 this patch: 0
netdev/header_inline success Link
netdev/stable success Stable not CCed

Commit Message

Prasanna Vengateshan Jan. 28, 2021, 6:41 a.m. UTC 
Support for phylink_validate() and reused KSZ commmon API for
phylink_mac_link_down() operation

Signed-off-by: Prasanna Vengateshan <prasanna.vengateshan@microchip.com>
---
 drivers/net/dsa/microchip/lan937x_main.c | 40 ++++++++++++++++++++++++
 1 file changed, 40 insertions(+)

Comments

Andrew Lunn Jan. 29, 2021, 1:12 a.m. UTC | #1 
> +	/* For T1 PHY */
> +	if (lan937x_is_internal_t1_phy_port(dev, port)) {
> +		phylink_set(mask, 100baseT_Full);
> +		phylink_set_port_modes(mask);

Since this is a T1 PHY, you should be using 100baseT1_Full.

This might be the first user of this for phylink, so please test this
actually works.

	 Andrew
diff mbox series

Patch

diff --git a/drivers/net/dsa/microchip/lan937x_main.c b/drivers/net/dsa/microchip/lan937x_main.c
index 41f7f5f8f435..b38735e36aef 100644
--- a/drivers/net/dsa/microchip/lan937x_main.c
+++ b/drivers/net/dsa/microchip/lan937x_main.c
@@ -327,6 +327,44 @@  static int lan937x_get_max_mtu(struct dsa_switch *ds, int port)
 	return FR_MAX_SIZE;
 }
 
+static void lan937x_phylink_validate(struct dsa_switch *ds, int port,
+				     unsigned long *supported,
+			  struct phylink_link_state *state)
+{
+	struct ksz_device *dev = ds->priv;
+	__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
+
+	if (phy_interface_mode_is_rgmii(state->interface) ||
+	    state->interface == PHY_INTERFACE_MODE_SGMII ||
+		state->interface == PHY_INTERFACE_MODE_RMII ||
+		state->interface == PHY_INTERFACE_MODE_MII ||
+		lan937x_is_internal_tx_phy_port(dev, port)) {
+		phylink_set(mask, 10baseT_Half);
+		phylink_set(mask, 10baseT_Full);
+		phylink_set(mask, 100baseT_Half);
+		phylink_set(mask, 100baseT_Full);
+		phylink_set(mask, Autoneg);
+		phylink_set_port_modes(mask);
+		phylink_set(mask, Pause);
+		phylink_set(mask, Asym_Pause);
+	}
+	/*  For RGMII & SGMII interfaces */
+	if (phy_interface_mode_is_rgmii(state->interface) ||
+	    state->interface == PHY_INTERFACE_MODE_SGMII) {
+		phylink_set(mask, 1000baseT_Full);
+	}
+	/* For T1 PHY */
+	if (lan937x_is_internal_t1_phy_port(dev, port)) {
+		phylink_set(mask, 100baseT_Full);
+		phylink_set_port_modes(mask);
+	}
+
+	bitmap_and(supported, supported, mask,
+		   __ETHTOOL_LINK_MODE_MASK_NBITS);
+	bitmap_and(state->advertising, state->advertising, mask,
+		   __ETHTOOL_LINK_MODE_MASK_NBITS);
+}
+
 const struct dsa_switch_ops lan937x_switch_ops = {
 	.get_tag_protocol	= lan937x_get_tag_protocol,
 	.setup			= lan937x_setup,
@@ -339,6 +377,8 @@  const struct dsa_switch_ops lan937x_switch_ops = {
 	.port_fast_age		= ksz_port_fast_age,
 	.port_max_mtu		= lan937x_get_max_mtu,
 	.port_change_mtu	= lan937x_change_mtu,
+	.phylink_validate	= lan937x_phylink_validate,
+	.phylink_mac_link_down	= ksz_mac_link_down,
 };
 
 int lan937x_switch_register(struct ksz_device *dev)