From patchwork Tue Mar 16 02:31:33 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shannon Nelson X-Patchwork-Id: 12141075 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C2B75C433E6 for ; Tue, 16 Mar 2021 02:32:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9464C65033 for ; Tue, 16 Mar 2021 02:32:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234539AbhCPCbx (ORCPT ); Mon, 15 Mar 2021 22:31:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38162 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234552AbhCPCbr (ORCPT ); Mon, 15 Mar 2021 22:31:47 -0400 Received: from mail-pl1-x630.google.com (mail-pl1-x630.google.com [IPv6:2607:f8b0:4864:20::630]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A563FC06174A for ; Mon, 15 Mar 2021 19:31:47 -0700 (PDT) Received: by mail-pl1-x630.google.com with SMTP id j6so16232006plx.6 for ; Mon, 15 Mar 2021 19:31:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pensando.io; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=V8uLGXlgaaRgU797WF6VONApVvF3LFLDbEvPRTYcduY=; b=OvDrzj9BycyYbJzZ6nDhRJ5V52AiDGoht9Ntym4whvzQXxdMitAvmCgd4QHOnDF35l TUOPpkw/vBKwgmGjuTR5nO+voAlF8TqArLXCDRSbsY9DZB8DWtsRgp4HXGIzDSu6iLoZ hkWYGFGvISHuFM0RM7vbOGsrvaO7zKP6vhpGqlHAoMwKypU/QgMLjKSXjcXOB+9+T5O+ xPEUgk9pcssVBwgt3KUhzzCyoOfO4IfEy3SqA5CYCNaTaQjEj2y8BsNcXGZOLkopiG9Z M0BvEdgCV4TUfaRen10m7PuUFzAUANE4oeIVOHKpARIY3WA1XNiGRMt4s0aqrFlJmy3P 5D3A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=V8uLGXlgaaRgU797WF6VONApVvF3LFLDbEvPRTYcduY=; b=OyLEATJ7BJmzTqb+RquCoNiEpPg8kvlJhCq+UfTeicqGxpjmSyvor5AmQR4Wybbq3L mUeJHnEMqO5tYrGmmFjodFfazS9hULEvJ0EO6cc3HEoRfCCdcYP1LfcWG6OJ5DP0z9ea 36vjZV0Dw+v1+MS8thpdjmtz1/UaOgnAzDcGJo247D70necV9zaEgjQ5RXFW8ek+kSiL DVR1ji0CTDLpFz4R3rBR5Q2lfPo2/ByjyWM/KH72rhQD7GyigKgSF/VL2aon8OaYdv1F HBM3sddNodjSmuoycA69Bgq4DMlATd6ixu18p8duz2x8ejPW1zIVnokNWHI6KKIxmsmW sxpA== X-Gm-Message-State: AOAM530zwL1Cytv1QnjoiNqmi5etIk00XUF7m+XsMwTuGju6W5qStpI3 sZmnYOUW8eClv9v8kT0cmGV3T4QWpS/UBg== X-Google-Smtp-Source: ABdhPJyesjmHpu152uLIldS6vtMXEfin/t2QgCNGze1r6ydkCfhrB1c0AwJAfxk8v4cjMAolobLFiw== X-Received: by 2002:a17:90a:e298:: with SMTP id d24mr2275978pjz.171.1615861906837; Mon, 15 Mar 2021 19:31:46 -0700 (PDT) Received: from driver-dev1.pensando.io ([12.226.153.42]) by smtp.gmail.com with ESMTPSA id t18sm8687743pgg.33.2021.03.15.19.31.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Mar 2021 19:31:46 -0700 (PDT) From: Shannon Nelson To: netdev@vger.kernel.org, davem@davemloft.net, kuba@kernel.org Cc: drivers@pensando.io, Shannon Nelson Subject: [PATCH net-next 1/4] ionic: simplify TSO descriptor mapping Date: Mon, 15 Mar 2021 19:31:33 -0700 Message-Id: <20210316023136.22702-2-snelson@pensando.io> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210316023136.22702-1-snelson@pensando.io> References: <20210316023136.22702-1-snelson@pensando.io> Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org One issue with the original TSO code was that it was working too hard to deal with skb layouts that were never going to show up, such as an skb->data that was longer than a single descriptor's length. The other issue was trying to arrange the fragment dma mapping at the same time as figuring out the descriptors needed. There was just too much going on at the same time. Now we do the dma mapping first, which sets up the buffers with skb->data in buf[0] and the remaining frags in buf[1..n-1]. Next we spread the bufs across the descriptors needed, where each descriptor gets up to mss number of bytes. Signed-off-by: Shannon Nelson --- .../net/ethernet/pensando/ionic/ionic_dev.h | 5 +- .../net/ethernet/pensando/ionic/ionic_txrx.c | 237 +++++++++--------- 2 files changed, 117 insertions(+), 125 deletions(-) diff --git a/drivers/net/ethernet/pensando/ionic/ionic_dev.h b/drivers/net/ethernet/pensando/ionic/ionic_dev.h index 339824cfd618..d0c969a6d43e 100644 --- a/drivers/net/ethernet/pensando/ionic/ionic_dev.h +++ b/drivers/net/ethernet/pensando/ionic/ionic_dev.h @@ -179,8 +179,11 @@ struct ionic_buf_info { struct page *page; dma_addr_t dma_addr; u32 page_offset; + u32 len; }; +#define IONIC_MAX_FRAGS (1 + IONIC_TX_MAX_SG_ELEMS_V1) + struct ionic_desc_info { union { void *desc; @@ -194,7 +197,7 @@ struct ionic_desc_info { struct ionic_rxq_sg_desc *rxq_sgl_desc; }; unsigned int nbufs; - struct ionic_buf_info bufs[IONIC_RX_MAX_SG_ELEMS + 1]; + struct ionic_buf_info bufs[IONIC_MAX_FRAGS]; ionic_desc_cb cb; void *cb_arg; }; diff --git a/drivers/net/ethernet/pensando/ionic/ionic_txrx.c b/drivers/net/ethernet/pensando/ionic/ionic_txrx.c index c63e6e7aa47b..639000a2e495 100644 --- a/drivers/net/ethernet/pensando/ionic/ionic_txrx.c +++ b/drivers/net/ethernet/pensando/ionic/ionic_txrx.c @@ -605,12 +605,51 @@ static dma_addr_t ionic_tx_map_frag(struct ionic_queue *q, return dma_addr; } +static int ionic_tx_map_tso(struct ionic_queue *q, struct sk_buff *skb, + struct ionic_buf_info *buf_info) +{ + struct device *dev = q->dev; + dma_addr_t dma_addr; + skb_frag_t *frag; + int frag_idx; + + dma_addr = ionic_tx_map_single(q, skb->data, skb_headlen(skb)); + if (dma_mapping_error(dev, dma_addr)) + return -EIO; + buf_info->dma_addr = dma_addr; + buf_info->len = skb_headlen(skb); + buf_info++; + + for (frag_idx = 0; frag_idx < skb_shinfo(skb)->nr_frags; frag_idx++, buf_info++) { + frag = &skb_shinfo(skb)->frags[frag_idx]; + dma_addr = ionic_tx_map_frag(q, frag, 0, skb_frag_size(frag)); + if (dma_mapping_error(dev, dma_addr)) + goto dma_fail; + buf_info->dma_addr = dma_addr; + buf_info->len = skb_frag_size(frag); + } + + return 0; + +dma_fail: + /* unwind the frag mappings and the head mapping */ + while (frag_idx > 0) { + frag_idx--; + buf_info--; + dma_unmap_page(dev, buf_info->dma_addr, + buf_info->len, DMA_TO_DEVICE); + } + dma_unmap_single(dev, buf_info->dma_addr, buf_info->len, DMA_TO_DEVICE); + return -EIO; +} + static void ionic_tx_clean(struct ionic_queue *q, struct ionic_desc_info *desc_info, struct ionic_cq_info *cq_info, void *cb_arg) { struct ionic_txq_sg_desc *sg_desc = desc_info->sg_desc; + struct ionic_buf_info *buf_info = desc_info->bufs; struct ionic_txq_sg_elem *elem = sg_desc->elems; struct ionic_tx_stats *stats = q_to_tx_stats(q); struct ionic_txq_desc *desc = desc_info->desc; @@ -623,20 +662,22 @@ static void ionic_tx_clean(struct ionic_queue *q, decode_txq_desc_cmd(le64_to_cpu(desc->cmd), &opcode, &flags, &nsge, &addr); - /* use unmap_single only if either this is not TSO, - * or this is first descriptor of a TSO - */ - if (opcode != IONIC_TXQ_DESC_OPCODE_TSO || - flags & IONIC_TXQ_DESC_FLAG_TSO_SOT) + if (opcode != IONIC_TXQ_DESC_OPCODE_TSO) { dma_unmap_single(dev, (dma_addr_t)addr, le16_to_cpu(desc->len), DMA_TO_DEVICE); - else - dma_unmap_page(dev, (dma_addr_t)addr, - le16_to_cpu(desc->len), DMA_TO_DEVICE); - - for (i = 0; i < nsge; i++, elem++) - dma_unmap_page(dev, (dma_addr_t)le64_to_cpu(elem->addr), - le16_to_cpu(elem->len), DMA_TO_DEVICE); + for (i = 0; i < nsge; i++, elem++) + dma_unmap_page(dev, (dma_addr_t)le64_to_cpu(elem->addr), + le16_to_cpu(elem->len), DMA_TO_DEVICE); + } else { + if (flags & IONIC_TXQ_DESC_FLAG_TSO_EOT) { + dma_unmap_single(dev, (dma_addr_t)buf_info->dma_addr, + buf_info->len, DMA_TO_DEVICE); + buf_info++; + for (i = 1; i < desc_info->nbufs; i++, buf_info++) + dma_unmap_page(dev, (dma_addr_t)buf_info->dma_addr, + buf_info->len, DMA_TO_DEVICE); + } + } if (cb_arg) { struct sk_buff *skb = cb_arg; @@ -794,29 +835,23 @@ static struct ionic_txq_desc *ionic_tx_tso_next(struct ionic_queue *q, static int ionic_tx_tso(struct ionic_queue *q, struct sk_buff *skb) { + struct ionic_buf_info buf_info[IONIC_MAX_FRAGS] = {{0}}; struct ionic_tx_stats *stats = q_to_tx_stats(q); - struct ionic_desc_info *rewind_desc_info; struct ionic_txq_sg_elem *elem; - struct device *dev = q->dev; struct ionic_txq_desc *desc; - unsigned int frag_left = 0; - unsigned int offset = 0; - u16 abort = q->head_idx; - unsigned int len_left; + unsigned int chunk_len; + unsigned int frag_rem; + unsigned int frag_idx; + unsigned int tso_rem; + unsigned int seg_rem; dma_addr_t desc_addr; + dma_addr_t frag_addr; unsigned int hdrlen; unsigned int nfrags; - unsigned int seglen; - u64 total_bytes = 0; - u64 total_pkts = 0; - u16 rewind = abort; - unsigned int left; unsigned int len; unsigned int mss; - skb_frag_t *frag; bool start, done; bool outer_csum; - dma_addr_t addr; bool has_vlan; u16 desc_len; u8 desc_nsge; @@ -824,9 +859,12 @@ static int ionic_tx_tso(struct ionic_queue *q, struct sk_buff *skb) bool encap; int err; + if (unlikely(ionic_tx_map_tso(q, skb, buf_info))) + return -EIO; + + len = skb->len; mss = skb_shinfo(skb)->gso_size; nfrags = skb_shinfo(skb)->nr_frags; - len_left = skb->len - skb_headlen(skb); outer_csum = (skb_shinfo(skb)->gso_type & SKB_GSO_GRE_CSUM) || (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_TUNNEL_CSUM); has_vlan = !!skb_vlan_tag_present(skb); @@ -851,117 +889,68 @@ static int ionic_tx_tso(struct ionic_queue *q, struct sk_buff *skb) else hdrlen = skb_transport_offset(skb) + tcp_hdrlen(skb); - seglen = hdrlen + mss; - left = skb_headlen(skb); + tso_rem = len; + seg_rem = min(tso_rem, hdrlen + mss); - desc = ionic_tx_tso_next(q, &elem); - start = true; + frag_idx = 0; + frag_addr = 0; + frag_rem = 0; - /* Chop skb->data up into desc segments */ + start = true; - while (left > 0) { - len = min(seglen, left); - frag_left = seglen - len; - desc_addr = ionic_tx_map_single(q, skb->data + offset, len); - if (dma_mapping_error(dev, desc_addr)) - goto err_out_abort; - desc_len = len; + while (tso_rem > 0) { + desc = NULL; + elem = NULL; + desc_addr = 0; + desc_len = 0; desc_nsge = 0; - left -= len; - offset += len; - if (nfrags > 0 && frag_left > 0) - continue; - done = (nfrags == 0 && left == 0); - ionic_tx_tso_post(q, desc, skb, - desc_addr, desc_nsge, desc_len, - hdrlen, mss, - outer_csum, - vlan_tci, has_vlan, - start, done); - total_pkts++; - total_bytes += start ? len : len + hdrlen; - desc = ionic_tx_tso_next(q, &elem); - start = false; - seglen = mss; - } - - /* Chop skb frags into desc segments */ - - for (frag = skb_shinfo(skb)->frags; len_left; frag++) { - offset = 0; - left = skb_frag_size(frag); - len_left -= left; - nfrags--; - stats->frags++; - - while (left > 0) { - if (frag_left > 0) { - len = min(frag_left, left); - frag_left -= len; - addr = ionic_tx_map_frag(q, frag, offset, len); - if (dma_mapping_error(dev, addr)) - goto err_out_abort; - elem->addr = cpu_to_le64(addr); - elem->len = cpu_to_le16(len); - elem++; - desc_nsge++; - left -= len; - offset += len; - if (nfrags > 0 && frag_left > 0) - continue; - done = (nfrags == 0 && left == 0); - ionic_tx_tso_post(q, desc, skb, desc_addr, - desc_nsge, desc_len, - hdrlen, mss, outer_csum, - vlan_tci, has_vlan, - start, done); - total_pkts++; - total_bytes += start ? len : len + hdrlen; + /* loop until a full tcp segment can be created */ + while (seg_rem > 0) { + /* if the fragment is exhausted get the next one */ + if (frag_rem == 0) { + /* grab the next fragment */ + frag_addr = buf_info[frag_idx].dma_addr; + frag_rem = buf_info[frag_idx].len; + frag_idx++; + } + chunk_len = min(frag_rem, seg_rem); + if (!desc) { + /* fill main descriptor */ desc = ionic_tx_tso_next(q, &elem); - start = false; + desc_addr = frag_addr; + desc_len = chunk_len; } else { - len = min(mss, left); - frag_left = mss - len; - desc_addr = ionic_tx_map_frag(q, frag, - offset, len); - if (dma_mapping_error(dev, desc_addr)) - goto err_out_abort; - desc_len = len; - desc_nsge = 0; - left -= len; - offset += len; - if (nfrags > 0 && frag_left > 0) - continue; - done = (nfrags == 0 && left == 0); - ionic_tx_tso_post(q, desc, skb, desc_addr, - desc_nsge, desc_len, - hdrlen, mss, outer_csum, - vlan_tci, has_vlan, - start, done); - total_pkts++; - total_bytes += start ? len : len + hdrlen; - desc = ionic_tx_tso_next(q, &elem); - start = false; + /* fill sg descriptor */ + elem->addr = cpu_to_le64(frag_addr); + elem->len = cpu_to_le16(chunk_len); + elem++; + desc_nsge++; } + frag_addr += chunk_len; + frag_rem -= chunk_len; + tso_rem -= chunk_len; + seg_rem -= chunk_len; + } + seg_rem = min(tso_rem, mss); + done = (tso_rem == 0); + if (done) { + memcpy(&q->info[q->head_idx].bufs, buf_info, sizeof(buf_info)); + q->info[q->head_idx].nbufs = nfrags + 1; } + /* post descriptor */ + ionic_tx_tso_post(q, desc, skb, + desc_addr, desc_nsge, desc_len, + hdrlen, mss, outer_csum, vlan_tci, has_vlan, + start, done); + start = false; } - stats->pkts += total_pkts; - stats->bytes += total_bytes; + stats->pkts += DIV_ROUND_UP(len - hdrlen, mss); + stats->bytes += len; stats->tso++; - stats->tso_bytes += total_bytes; + stats->tso_bytes = len; return 0; - -err_out_abort: - while (rewind != q->head_idx) { - rewind_desc_info = &q->info[rewind]; - ionic_tx_clean(q, rewind_desc_info, NULL, NULL); - rewind = (rewind + 1) & (q->num_descs - 1); - } - q->head_idx = abort; - - return -ENOMEM; } static int ionic_tx_calc_csum(struct ionic_queue *q, struct sk_buff *skb)