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[93.35.189.2]) by smtp.googlemail.com with ESMTPSA id z17sm10003874ejc.69.2021.05.02.16.07.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 02 May 2021 16:07:25 -0700 (PDT) From: Ansuel Smith To: Florian Fainelli Cc: Ansuel Smith , Andrew Lunn , Vivien Didelot , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , Russell King , netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH net-next v2 11/17] net: dsa: qca8k: clear MASTER_EN after phy read/write Date: Mon, 3 May 2021 01:07:03 +0200 Message-Id: <20210502230710.30676-11-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210502230710.30676-1-ansuelsmth@gmail.com> References: <20210502230710.30676-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC Clear MDIO_MASTER_EN bit from MDIO_MASTER_CTRL after read/write operation. The MDIO_MASTER_EN bit is not reset after read/write operation and the next operation can be wrongly interpreted by the switch as a mdio operation. This cause a production of wrong/garbage data from the switch and underfined bheavior. (random port drop, unplugged port flagged with link up, wrong port speed) Also on driver remove the MASTER_CTRL can be left set and cause the malfunction of any next driver using the mdio device. Signed-off-by: Ansuel Smith --- drivers/net/dsa/qca8k.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c index d522398d504e..f64e3215a515 100644 --- a/drivers/net/dsa/qca8k.c +++ b/drivers/net/dsa/qca8k.c @@ -639,8 +639,14 @@ qca8k_mdio_write(struct qca8k_priv *priv, int port, u32 regnum, u16 data) if (ret) return ret; - return qca8k_busy_wait(priv, QCA8K_MDIO_MASTER_CTRL, - QCA8K_MDIO_MASTER_BUSY); + ret = qca8k_busy_wait(priv, QCA8K_MDIO_MASTER_CTRL, + QCA8K_MDIO_MASTER_BUSY); + + /* even if the busy_wait timeouts try to clear the MASTER_EN */ + qca8k_reg_clear(priv, QCA8K_MDIO_MASTER_CTRL, + QCA8K_MDIO_MASTER_EN); + + return ret; } static int @@ -674,6 +680,10 @@ qca8k_mdio_read(struct qca8k_priv *priv, int port, u32 regnum) val &= QCA8K_MDIO_MASTER_DATA_MASK; + /* even if the busy_wait timeouts try to clear the MASTER_EN */ + qca8k_reg_clear(priv, QCA8K_MDIO_MASTER_CTRL, + QCA8K_MDIO_MASTER_EN); + return val; }