From patchwork Mon Jul 12 13:06:29 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandru Tachici X-Patchwork-Id: 12371087 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5BDD7C11F66 for ; Mon, 12 Jul 2021 12:58:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 44E186101E for ; Mon, 12 Jul 2021 12:58:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234399AbhGLNBM (ORCPT ); Mon, 12 Jul 2021 09:01:12 -0400 Received: from mx0a-00128a01.pphosted.com ([148.163.135.77]:58312 "EHLO mx0a-00128a01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233807AbhGLNBK (ORCPT ); Mon, 12 Jul 2021 09:01:10 -0400 Received: from pps.filterd (m0167088.ppops.net [127.0.0.1]) by mx0a-00128a01.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 16CCoOts014799; Mon, 12 Jul 2021 08:58:15 -0400 Received: from nwd2mta4.analog.com ([137.71.173.58]) by mx0a-00128a01.pphosted.com with ESMTP id 39rj8dgs3d-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 12 Jul 2021 08:58:15 -0400 Received: from ASHBMBX8.ad.analog.com (ASHBMBX8.ad.analog.com [10.64.17.5]) by nwd2mta4.analog.com (8.14.7/8.14.7) with ESMTP id 16CCwDl7024687 (version=TLSv1/SSLv3 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 12 Jul 2021 08:58:14 -0400 Received: from ASHBMBX9.ad.analog.com (10.64.17.10) by ASHBMBX8.ad.analog.com (10.64.17.5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.858.5; Mon, 12 Jul 2021 08:58:13 -0400 Received: from zeus.spd.analog.com (10.66.68.11) by ashbmbx9.ad.analog.com (10.64.17.10) with Microsoft SMTP Server id 15.2.858.5 via Frontend Transport; Mon, 12 Jul 2021 08:58:12 -0400 Received: from localhost.localdomain ([10.48.65.12]) by zeus.spd.analog.com (8.15.1/8.15.1) with ESMTP id 16CCvx0E018858; Mon, 12 Jul 2021 08:58:10 -0400 From: To: , , CC: , , , , , , Alexandru Tachici Subject: [PATCH v2 5/7] net: phy: adin1100: Add ethtool master-slave support Date: Mon, 12 Jul 2021 16:06:29 +0300 Message-ID: <20210712130631.38153-6-alexandru.tachici@analog.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210712130631.38153-1-alexandru.tachici@analog.com> References: <20210712130631.38153-1-alexandru.tachici@analog.com> MIME-Version: 1.0 X-ADIRuleOP-NewSCL: Rule Triggered X-Proofpoint-GUID: w3T1DuXk6yiVsVUrndxrd8LsPHh0MKdm X-Proofpoint-ORIG-GUID: w3T1DuXk6yiVsVUrndxrd8LsPHh0MKdm X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391,18.0.790 definitions=2021-07-12_07:2021-07-12,2021-07-12 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 phishscore=0 impostorscore=0 adultscore=0 mlxlogscore=999 lowpriorityscore=0 bulkscore=0 priorityscore=1501 mlxscore=0 spamscore=0 clxscore=1015 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2104190000 definitions=main-2107120101 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org From: Alexandru Tachici Allow user to select the advertised master-slave configuration through ethtool. Signed-off-by: Alexandru Tachici Reviewed-by: Andrew Lunn --- drivers/net/phy/adin1100.c | 78 +++++++++++++++++++++++++++++++++++++- 1 file changed, 77 insertions(+), 1 deletion(-) diff --git a/drivers/net/phy/adin1100.c b/drivers/net/phy/adin1100.c index 94deaf52bbcd..ae216a80608b 100644 --- a/drivers/net/phy/adin1100.c +++ b/drivers/net/phy/adin1100.c @@ -37,7 +37,11 @@ static const int phy_10_features_array[] = { #define ADIN_AN_STATUS 0x0201 #define ADIN_AN_ADV_ABILITY_L 0x0202 +#define ADIN_AN_ADV_FORCE_MS BIT(12) + #define ADIN_AN_ADV_ABILITY_M 0x0203 +#define ADIN_AN_ADV_MST BIT(4) + #define ADIN_AN_ADV_ABILITY_H 0x0204U #define ADIN_AN_ADV_B10L_TX_LVL_HI_ABL BIT(13) #define ADIN_AN_ADV_B10L_TX_LVL_HI_REQ BIT(12) @@ -69,6 +73,10 @@ static const int phy_10_features_array[] = { #define ADIN_CRSM_SFT_PD_RDY BIT(1) #define ADIN_CRSM_SYS_RDY BIT(0) +#define AN_PHY_INST_STATUS 0x8030 +#define ADIN_IS_CFG_SLV BIT(2) +#define ADIN_IS_CFG_MST BIT(3) + #define ADIN_MAC_IF_LOOPBACK 0x803d #define ADIN_MAC_IF_LOOPBACK_EN BIT(0) #define ADIN_MAC_IF_REMOTE_LOOPBACK_EN BIT(2) @@ -164,6 +172,7 @@ static int adin_read_lpa(struct phy_device *phydev) static int adin_read_status(struct phy_device *phydev) { int ret; + int cfg; ret = genphy_c45_read_link(phydev); if (ret) @@ -173,6 +182,8 @@ static int adin_read_status(struct phy_device *phydev) phydev->duplex = DUPLEX_UNKNOWN; phydev->pause = 0; phydev->asym_pause = 0; + phydev->master_slave_get = MASTER_SLAVE_CFG_UNKNOWN; + phydev->master_slave_state = MASTER_SLAVE_STATE_UNKNOWN; if (phydev->autoneg == AUTONEG_ENABLE) { ret = adin_read_lpa(phydev); @@ -187,7 +198,37 @@ static int adin_read_status(struct phy_device *phydev) phydev->duplex = DUPLEX_FULL; } - return ret; + ret = phy_read_mmd(phydev, MDIO_MMD_AN, ADIN_AN_ADV_ABILITY_L); + if (ret < 0) + return ret; + + cfg = phy_read_mmd(phydev, MDIO_MMD_AN, ADIN_AN_ADV_ABILITY_M); + if (cfg < 0) + return cfg; + + if (ret & ADIN_AN_ADV_FORCE_MS) { + if (cfg & ADIN_AN_ADV_MST) + phydev->master_slave_get = MASTER_SLAVE_CFG_MASTER_FORCE; + else + phydev->master_slave_get = MASTER_SLAVE_CFG_SLAVE_FORCE; + } else { + if (cfg & ADIN_AN_ADV_MST) + phydev->master_slave_get = MASTER_SLAVE_CFG_MASTER_PREFERRED; + else + phydev->master_slave_get = MASTER_SLAVE_CFG_SLAVE_PREFERRED; + } + + ret = phy_read_mmd(phydev, MDIO_MMD_AN, AN_PHY_INST_STATUS); + if (ret < 0) + return ret; + + if (ret & ADIN_IS_CFG_SLV) + phydev->master_slave_state = MASTER_SLAVE_STATE_SLAVE; + + if (ret & ADIN_IS_CFG_MST) + phydev->master_slave_state = MASTER_SLAVE_STATE_MASTER; + + return 0; } static int adin_config_aneg(struct phy_device *phydev) @@ -201,6 +242,41 @@ static int adin_config_aneg(struct phy_device *phydev) if (phydev->autoneg == AUTONEG_DISABLE) return 0; + switch (phydev->master_slave_set) { + case MASTER_SLAVE_CFG_MASTER_FORCE: + case MASTER_SLAVE_CFG_SLAVE_FORCE: + ret = phy_set_bits_mmd(phydev, MDIO_MMD_AN, ADIN_AN_ADV_ABILITY_L, + ADIN_AN_ADV_FORCE_MS); + if (ret < 0) + return ret; + break; + case MASTER_SLAVE_CFG_MASTER_PREFERRED: + case MASTER_SLAVE_CFG_SLAVE_PREFERRED: + ret = phy_clear_bits_mmd(phydev, MDIO_MMD_AN, ADIN_AN_ADV_ABILITY_L, + ADIN_AN_ADV_FORCE_MS); + break; + default: + break; + } + + switch (phydev->master_slave_set) { + case MASTER_SLAVE_CFG_MASTER_FORCE: + case MASTER_SLAVE_CFG_MASTER_PREFERRED: + ret = phy_set_bits_mmd(phydev, MDIO_MMD_AN, ADIN_AN_ADV_ABILITY_M, ADIN_AN_ADV_MST); + if (ret < 0) + return ret; + break; + case MASTER_SLAVE_CFG_SLAVE_FORCE: + case MASTER_SLAVE_CFG_SLAVE_PREFERRED: + ret = phy_clear_bits_mmd(phydev, MDIO_MMD_AN, ADIN_AN_ADV_ABILITY_M, + ADIN_AN_ADV_MST); + if (ret < 0) + return ret; + break; + default: + break; + } + if (priv->tx_level_24v) ret = phy_set_bits_mmd(phydev, MDIO_MMD_AN, ADIN_AN_ADV_ABILITY_H,