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Thu, 22 Jul 2021 11:06:24 +0000 Received: from HQMAIL107.nvidia.com (172.20.187.13) by HQMAIL109.nvidia.com (172.20.187.15) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 22 Jul 2021 04:06:24 -0700 Received: from vdi.nvidia.com (172.20.187.5) by mail.nvidia.com (172.20.187.13) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 22 Jul 2021 11:06:19 +0000 From: Boris Pismenny To: , , , , , , , , , , CC: , , , , , Subject: [PATCH v5 net-next 27/36] mlx5e: make preparation in TLS code for NVMEoTCP CRC Tx offload Date: Thu, 22 Jul 2021 14:03:16 +0300 Message-ID: <20210722110325.371-28-borisp@nvidia.com> X-Mailer: git-send-email 2.24.1 In-Reply-To: <20210722110325.371-1-borisp@nvidia.com> References: <20210722110325.371-1-borisp@nvidia.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: c8487d01-3690-4ae1-70f7-08d94d00bec3 X-MS-TrafficTypeDiagnostic: BYAPR12MB3239: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:4125; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Jul 2021 11:06:24.4264 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c8487d01-3690-4ae1-70f7-08d94d00bec3 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.112.32];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT048.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR12MB3239 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org From: Yoray Zack NVMEoTCP CRC Tx offload is similar to TLS Tx offload, and uses DUMP wqe as well. To avoid duplicate functions the following changes were added: 1. Add DUMP_WQE.type field (=TLS or NVMEoTCP). 2. change in mlx5e_ktls_tx_handle_resync_dump_comp to handle also NVMEoTCP Tx DUMP WQE. Signed-off-by: Yoray Zack --- drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h | 5 +++++ .../ethernet/mellanox/mlx5/core/en_accel/ktls_tx.c | 12 ++++++++++-- 2 files changed, 15 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h b/drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h index f0190ee6e42c..c7f979dfdd69 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h @@ -77,6 +77,10 @@ u16 mlx5e_select_queue(struct net_device *dev, struct sk_buff *skb, netdev_tx_t mlx5e_xmit(struct sk_buff *skb, struct net_device *dev); bool mlx5e_poll_tx_cq(struct mlx5e_cq *cq, int napi_budget); void mlx5e_free_txqsq_descs(struct mlx5e_txqsq *sq); +enum mlx5e_dump_wqe_type { + MLX5E_DUMP_WQE_TLS, + MLX5E_DUMP_WQE_NVMEOTCP, +}; static inline bool mlx5e_wqc_has_room_for(struct mlx5_wq_cyc *wq, u16 cc, u16 pc, u16 n) @@ -140,6 +144,7 @@ struct mlx5e_tx_wqe_info { u8 num_fifo_pkts; #ifdef CONFIG_MLX5_EN_TLS struct page *resync_dump_frag_page; + enum mlx5e_dump_wqe_type type; #endif }; diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_tx.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_tx.c index 9ad3459fb63a..64780d0143ec 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_tx.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_tx.c @@ -154,6 +154,7 @@ static void tx_fill_wi(struct mlx5e_txqsq *sq, .num_wqebbs = num_wqebbs, .num_bytes = num_bytes, .resync_dump_frag_page = page, + .type = MLX5E_DUMP_WQE_TLS, }; } @@ -358,8 +359,15 @@ void mlx5e_ktls_tx_handle_resync_dump_comp(struct mlx5e_txqsq *sq, mlx5e_tx_dma_unmap(sq->pdev, dma); put_page(wi->resync_dump_frag_page); - stats->tls_dump_packets++; - stats->tls_dump_bytes += wi->num_bytes; + + switch (wi->type) { + case MLX5E_DUMP_WQE_TLS: + stats->tls_dump_packets++; + stats->tls_dump_bytes += wi->num_bytes; + break; + case MLX5E_DUMP_WQE_NVMEOTCP: + break; + } } static void tx_post_fence_nop(struct mlx5e_txqsq *sq)