From patchwork Thu Aug 19 07:39:40 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Steen Hegelund X-Patchwork-Id: 12446521 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B7AD7C43214 for ; Thu, 19 Aug 2021 07:40:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9DB726112D for ; Thu, 19 Aug 2021 07:40:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236821AbhHSHke (ORCPT ); Thu, 19 Aug 2021 03:40:34 -0400 Received: from esa.microchip.iphmx.com ([68.232.153.233]:23400 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236756AbhHSHkb (ORCPT ); Thu, 19 Aug 2021 03:40:31 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1629358795; x=1660894795; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=DPvk51r+tNaQIX17IGj6lTpfR9i78AJ8Ij1ANlimbSQ=; b=ChNZXFKswj/X3XCFhHaFsBXls92YnnoLDbT+TodaouowMaOAhWiGhN6F 1ZDpQmrekuUcvAPxdK+xmbVqc+Q/UdSsGLcnoqqlklIcoTzk6UjQ8ml+Q WnIx5Iu0SfdHAkVqUnvLG+/HOOZmdakd7Awbz5m7+rqSQKw2LlpGLJ+yr ViniU9bY/NGq8Sw/ofJBBRE34skYDsJ0iAP7IX3V2l2UPWzFdMXQjlk4Q afZ28XNbvQb/7XLgzpy06ei+CtXoQ4SGtrvx183ewRXrCSFIjBPjAcDSi ESBwHjJxbLvqOg366c0JJiS0akt05R+/xSE2Qw2/imSq5hfYQv8vf+/BP w==; IronPort-SDR: ces0+IBP6z7YS69uhClnp1kN6Z23+ZJsBHrp1A9qOH/nXBDcjJ3FdP2gpKDRR07fUUMsAXvGZ6 aVldLOslLgZpzWlXqT8LnaAAySC63PsAUhB09Nzm2HyL6qVLboz6arXfu84s7Bq3r6hG9YobwP k6v3pQlmE0x186Q7R0JfPiCV2RfgJWaejRr8X1A2FQ953+VGTAuoqf/OP4Gqb3ubdfqJOFsNh6 yO6GSO9c2mpugP0OxnrzVj9locjVWGtan/ZWKySJBghyC2Q/1/zD+quqVyl5sBle+jt2QK1T/9 QrvsrS96ADFK4olOyL46TacM X-IronPort-AV: E=Sophos;i="5.84,334,1620716400"; d="scan'208";a="133396229" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa3.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 19 Aug 2021 00:39:54 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.87.72) by chn-vm-ex02.mchp-main.com (10.10.87.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.14; Thu, 19 Aug 2021 00:39:54 -0700 Received: from den-dk-m31857.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2176.14 via Frontend Transport; Thu, 19 Aug 2021 00:39:52 -0700 From: Steen Hegelund To: "David S. Miller" , Jakub Kicinski , , , , , "Rob Herring" , CC: Steen Hegelund , Alexandre Belloni Subject: [PATCH net-next v2 2/2] arm64: dts: sparx5: Add the Sparx5 switch frame DMA support Date: Thu, 19 Aug 2021 09:39:40 +0200 Message-ID: <20210819073940.1589383-3-steen.hegelund@microchip.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210819073940.1589383-1-steen.hegelund@microchip.com> References: <20210819073940.1589383-1-steen.hegelund@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org This adds the interrupt for the Sparx5 Frame DMA. If this configuration is present the Sparx5 SwitchDev driver will use the Frame DMA feature, and if not it will use register based injection and extraction for sending and receiving frames to the CPU. Signed-off-by: Steen Hegelund --- arch/arm64/boot/dts/microchip/sparx5.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/microchip/sparx5.dtsi b/arch/arm64/boot/dts/microchip/sparx5.dtsi index ad07fff40544..787ebcec121d 100644 --- a/arch/arm64/boot/dts/microchip/sparx5.dtsi +++ b/arch/arm64/boot/dts/microchip/sparx5.dtsi @@ -471,8 +471,9 @@ switch: switch@0x600000000 { <0x6 0x10004000 0x7fc000>, <0x6 0x11010000 0xaf0000>; reg-names = "cpu", "dev", "gcb"; - interrupt-names = "xtr"; - interrupts = ; + interrupt-names = "xtr", "fdma"; + interrupts = , + ; resets = <&reset 0>; reset-names = "switch"; };