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net: dsa: mv88e6xxx: Update mv88e6393x serdes errata

Message ID 20210824064413.95675-1-nathan@nathanrossi.com (mailing list archive)
State Accepted
Commit 3b0720ba00a7413997ad331838d22c81f252556a
Delegated to: Netdev Maintainers
Headers show
Series net: dsa: mv88e6xxx: Update mv88e6393x serdes errata | expand

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Commit Message

Nathan Rossi Aug. 24, 2021, 6:44 a.m. UTC 
From: Nathan Rossi <nathan.rossi@digi.com>

In early erratas this issue only covered port 0 when changing from
[x]MII (rev A 3.6). In subsequent errata versions this errata changed to
cover the additional "Hardware reset in CPU managed mode" condition, and
removed the note specifying that it only applied to port 0.

In designs where the device is configured with CPU managed mode
(CPU_MGD), on reset all SERDES ports (p0, p9, p10) have a stuck power
down bit and require this initial power up procedure. As such apply this
errata to all three SERDES ports of the mv88e6393x.

Signed-off-by: Nathan Rossi <nathan.rossi@digi.com>
---
 drivers/net/dsa/mv88e6xxx/serdes.c | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

---
2.33.0

Comments

patchwork-bot+netdevbpf@kernel.org Aug. 24, 2021, 9:50 a.m. UTC | #1 
Hello:

This patch was applied to netdev/net.git (refs/heads/master):

On Tue, 24 Aug 2021 06:44:13 +0000 you wrote:
> From: Nathan Rossi <nathan.rossi@digi.com>
> 
> In early erratas this issue only covered port 0 when changing from
> [x]MII (rev A 3.6). In subsequent errata versions this errata changed to
> cover the additional "Hardware reset in CPU managed mode" condition, and
> removed the note specifying that it only applied to port 0.
> 
> [...]

Here is the summary with links:
  - net: dsa: mv88e6xxx: Update mv88e6393x serdes errata
    https://git.kernel.org/netdev/net/c/3b0720ba00a7

You are awesome, thank you!
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diff mbox series

Patch

diff --git a/drivers/net/dsa/mv88e6xxx/serdes.c b/drivers/net/dsa/mv88e6xxx/serdes.c
index b1d46dd8ea..6ea0036787 100644
--- a/drivers/net/dsa/mv88e6xxx/serdes.c
+++ b/drivers/net/dsa/mv88e6xxx/serdes.c
@@ -1277,15 +1277,16 @@  static int mv88e6393x_serdes_port_errata(struct mv88e6xxx_chip *chip, int lane)
 	int err;
 
 	/* mv88e6393x family errata 4.6:
-	 * Cannot clear PwrDn bit on SERDES on port 0 if device is configured
-	 * CPU_MGD mode or P0_mode is configured for [x]MII.
-	 * Workaround: Set Port0 SERDES register 4.F002 bit 5=0 and bit 15=1.
+	 * Cannot clear PwrDn bit on SERDES if device is configured CPU_MGD
+	 * mode or P0_mode is configured for [x]MII.
+	 * Workaround: Set SERDES register 4.F002 bit 5=0 and bit 15=1.
 	 *
 	 * It seems that after this workaround the SERDES is automatically
 	 * powered up (the bit is cleared), so power it down.
 	 */
-	if (lane == MV88E6393X_PORT0_LANE) {
-		err = mv88e6390_serdes_read(chip, MV88E6393X_PORT0_LANE,
+	if (lane == MV88E6393X_PORT0_LANE || lane == MV88E6393X_PORT9_LANE ||
+	    lane == MV88E6393X_PORT10_LANE) {
+		err = mv88e6390_serdes_read(chip, lane,
 					    MDIO_MMD_PHYXS,
 					    MV88E6393X_SERDES_POC, &reg);
 		if (err)