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[2/3] net: macb: align for OSSMODE offset

Message ID 20210915064721.5530-3-claudiu.beznea@microchip.com (mailing list archive)
State Superseded
Delegated to: Netdev Maintainers
Headers show
Series net: macb: add support for MII on RGMII interface | expand

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netdev/module_param success Was 0 now: 0
netdev/build_32bit success Errors and warnings before: 25 this patch: 25
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netdev/checkpatch success total: 0 errors, 0 warnings, 0 checks, 8 lines checked
netdev/build_allmodconfig_warn success Errors and warnings before: 25 this patch: 25
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Commit Message

Claudiu Beznea Sept. 15, 2021, 6:47 a.m. UTC
Align for OSSMODE offset.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
---
 drivers/net/ethernet/cadence/macb.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Nicolas Ferre Sept. 15, 2021, 7:44 a.m. UTC | #1
On 15/09/2021 at 08:47, Claudiu Beznea wrote:
> Align for OSSMODE offset.
> 
> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>

Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
> ---
>   drivers/net/ethernet/cadence/macb.h | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h
> index d1e0e116b976..c33e98bfa5e8 100644
> --- a/drivers/net/ethernet/cadence/macb.h
> +++ b/drivers/net/ethernet/cadence/macb.h
> @@ -244,7 +244,7 @@
>   #define MACB_TZQ_OFFSET		12 /* Transmit zero quantum pause frame */
>   #define MACB_TZQ_SIZE		1
>   #define MACB_SRTSM_OFFSET	15 /* Store Receive Timestamp to Memory */
> -#define MACB_OSSMODE_OFFSET 24 /* Enable One Step Synchro Mode */
> +#define MACB_OSSMODE_OFFSET	24 /* Enable One Step Synchro Mode */
>   #define MACB_OSSMODE_SIZE	1
>   
>   /* Bitfields in NCFGR */
>
diff mbox series

Patch

diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h
index d1e0e116b976..c33e98bfa5e8 100644
--- a/drivers/net/ethernet/cadence/macb.h
+++ b/drivers/net/ethernet/cadence/macb.h
@@ -244,7 +244,7 @@ 
 #define MACB_TZQ_OFFSET		12 /* Transmit zero quantum pause frame */
 #define MACB_TZQ_SIZE		1
 #define MACB_SRTSM_OFFSET	15 /* Store Receive Timestamp to Memory */
-#define MACB_OSSMODE_OFFSET 24 /* Enable One Step Synchro Mode */
+#define MACB_OSSMODE_OFFSET	24 /* Enable One Step Synchro Mode */
 #define MACB_OSSMODE_SIZE	1
 
 /* Bitfields in NCFGR */