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[93.42.67.254]) by smtp.googlemail.com with ESMTPSA id 6sm6385232ejx.82.2021.09.20.09.47.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Sep 2021 09:47:56 -0700 (PDT) From: Ansuel Smith To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , netdev@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Ansuel Smith Subject: [net-next PATCH 1/1] drivers: net: dsa: qca8k: fix sgmii with some specific switch revision Date: Mon, 20 Sep 2021 18:47:45 +0200 Message-Id: <20210920164745.30162-2-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210920164745.30162-1-ansuelsmth@gmail.com> References: <20210920164745.30162-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Enable sgmii pll, tx driver and rx chain only on switch revision 1. This is not needed on later revision and with qca8327 cause the sgmii connection to not work at all. This is a case with some router that use the qca8327 switch and have the cpu port 0 using a sgmii connection. Without this, routers with this specific configuration won't work as the ports won't be able to communicate with the cpu port with the result of no traffic. Signed-off-by: Ansuel Smith --- drivers/net/dsa/qca8k.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c index bda5a9bf4f52..efeed8094865 100644 --- a/drivers/net/dsa/qca8k.c +++ b/drivers/net/dsa/qca8k.c @@ -1227,8 +1227,14 @@ qca8k_phylink_mac_config(struct dsa_switch *ds, int port, unsigned int mode, if (ret) return; - val |= QCA8K_SGMII_EN_PLL | QCA8K_SGMII_EN_RX | - QCA8K_SGMII_EN_TX | QCA8K_SGMII_EN_SD; + /* SGMII PLL, TX driver and RX chain is only needed in + * switch revision 1, later revision doesn't need this. + */ + if (priv->switch_revision == 1) + val |= QCA8K_SGMII_EN_PLL | QCA8K_SGMII_EN_RX | + QCA8K_SGMII_EN_TX | QCA8K_SGMII_EN_SD; + else + val |= QCA8K_SGMII_EN_SD; if (dsa_is_cpu_port(ds, port)) { /* CPU port, we're talking to the CPU MAC, be a PHY */