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Wed, 22 Sep 2021 09:31:18 +0000 Received: from HQMAIL105.nvidia.com (172.20.187.12) by HQMAIL109.nvidia.com (172.20.187.15) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Wed, 22 Sep 2021 02:31:17 -0700 Received: from HQMAIL111.nvidia.com (172.20.187.18) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Wed, 22 Sep 2021 09:31:17 +0000 Received: from vdi.nvidia.com (172.20.187.6) by mail.nvidia.com (172.20.187.18) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Wed, 22 Sep 2021 09:31:14 +0000 From: Mark Zhang To: , , CC: , , , , , Mark Zhang Subject: [PATCH RESEND iproute2-next 3/3] rdma: Add optional-counters set/unset support Date: Wed, 22 Sep 2021 12:30:38 +0300 Message-ID: <20210922093038.141905-4-markzhang@nvidia.com> X-Mailer: git-send-email 2.8.4 In-Reply-To: <20210922093038.141905-1-markzhang@nvidia.com> References: <20210922093038.141905-1-markzhang@nvidia.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 1ac971c6-2ab4-459e-701b-08d97dabbb5a X-MS-TrafficTypeDiagnostic: MN2PR12MB3872: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:1303; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Sep 2021 09:31:18.3622 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 1ac971c6-2ab4-459e-701b-08d97dabbb5a X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.112.32];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT013.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB3872 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: dsahern@gmail.com From: Neta Ostrovsky This patch provides an extension to the rdma statistics tool that allows to set/unset optional counters set dynamically, using new netlink commands. Note that the optional counter statistic implementation is driver-specific and may impact the performance. Examples: To enable a set of optional counters on link rocep8s0f0/1: $ sudo rdma statistic set link rocep8s0f0/1 optional-counters cc_rx_ce_pkts,cc_rx_cnp_pkts To disable all optional counters on link rocep8s0f0/1: $ sudo rdma statistic unset link rocep8s0f0/1 optional-counters Signed-off-by: Neta Ostrovsky Signed-off-by: Mark Zhang --- man/man8/rdma-statistic.8 | 32 ++++++++ rdma/stat.c | 163 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 195 insertions(+) diff --git a/man/man8/rdma-statistic.8 b/man/man8/rdma-statistic.8 index 885769bc..198ce0bf 100644 --- a/man/man8/rdma-statistic.8 +++ b/man/man8/rdma-statistic.8 @@ -65,6 +65,21 @@ rdma-statistic \- RDMA statistic counter configuration .B link .RI "[ " DEV/PORT_INDEX " ]" +.ti -8 +.B rdma statistic +.B set +.B link +.RI "[ " DEV/PORT_INDEX " ]" +.B optional-counters +.RI "[ " OPTIONAL-COUNTERS " ]" + +.ti -8 +.B rdma statistic +.B unset +.B link +.RI "[ " DEV/PORT_INDEX " ]" +.B optional-counters + .ti -8 .IR COUNTER_SCOPE " := " .RB "{ " link " | " dev " }" @@ -111,6 +126,13 @@ If this argument is omitted then a new counter will be allocated. .SS rdma statistic mode supported - Display the supported optional counters for each link. +.SS rdma statistic set - Enable a set of optional counters for a specific device/port. + +.I "OPTIONAL-COUNTERS" +- specifies the name of the optional counters to enable. Optional counters that are not specified will be disabled. Note that optional counters are driver-specific. + +.SS rdma statistic unset - Disable all optional counters for a specific device/port. + .SH "EXAMPLES" .PP rdma statistic show @@ -207,6 +229,16 @@ rdma statistic mode supported link mlx5_2/1 .RS 4 Display the optional counters that mlx5_2/1 supports. .RE +.PP +rdma statistic set link mlx5_2/1 optional-counters cc-rx-ce-pkts,cc_rx_cnp_pkts +.RS 4 +Enable the cc-rx-ce-pkts,cc_rx_cnp_pkts counters on device mlx5_2 port 1. +.RE +.PP +rdma statistic unset link mlx5_2/1 optional-counters +.RS 4 +Disable all the optional counters on device mlx5_2 port 1. +.RE .SH SEE ALSO .BR rdma (8), diff --git a/rdma/stat.c b/rdma/stat.c index 157b23bf..b5d1a59f 100644 --- a/rdma/stat.c +++ b/rdma/stat.c @@ -22,6 +22,8 @@ static int stat_help(struct rd *rd) pr_out(" %s statistic show link [ DEV/PORT_INDEX ]\n", rd->filename); pr_out(" %s statistic mode [ supported ]\n", rd->filename); pr_out(" %s statistic mode [ supported ] link [ DEV/PORT_INDEX ]\n", rd->filename); + pr_out(" %s statistic set link [ DEV/PORT_INDEX ] optional-counters [ OPTIONAL-COUNTERS ]\n", rd->filename); + pr_out(" %s statistic unset link [ DEV/PORT_INDEX ] optional-counters\n", rd->filename); pr_out("where OBJECT: = { qp }\n"); pr_out(" CRITERIA : = { type }\n"); pr_out(" COUNTER_SCOPE: = { link | dev }\n"); @@ -43,6 +45,8 @@ static int stat_help(struct rd *rd) pr_out(" %s statistic mode link mlx5_2/1\n", rd->filename); pr_out(" %s statistic mode supported\n", rd->filename); pr_out(" %s statistic mode supported link mlx5_2/1\n", rd->filename); + pr_out(" %s statistic set link mlx5_2/1 optional-counters cc-rx-ce-pkts,cc_rx_cnp_pkts\n", rd->filename); + pr_out(" %s statistic unset link mlx5_2/1 optional-counters\n", rd->filename); return 0; } @@ -878,6 +882,163 @@ static int stat_mode(struct rd *rd) return rd_exec_cmd(rd, cmds, "parameter"); } +static int stat_one_set_link_opcounters(const struct nlmsghdr *nlh, void *data) +{ + struct nlattr *tb[RDMA_NLDEV_ATTR_MAX] = {}; + struct nlattr *nla_entry, *tb_set; + int flags = NLM_F_REQUEST | NLM_F_ACK; + struct rd *rd = data; + uint32_t seq; + char *opcnt; + bool found; + + mnl_attr_parse(nlh, 0, rd_attr_cb, tb); + if (!tb[RDMA_NLDEV_ATTR_STAT_HWCOUNTERS]) + return MNL_CB_ERROR; + + if (rd_no_arg(rd)) { + stat_help(rd); + return -EINVAL; + } + + if (strcmpx(rd_argv(rd), "optional-counters") != 0) { + pr_err("Unknown parameter '%s'.\n", rd_argv(rd)); + return -EINVAL; + } + + rd_arg_inc(rd); + if (rd_no_arg(rd)) { + stat_help(rd); + return -EINVAL; + } + + rd_prepare_msg(rd, RDMA_NLDEV_CMD_STAT_SET, &seq, flags); + mnl_attr_put_u32(rd->nlh, RDMA_NLDEV_ATTR_DEV_INDEX, + rd->dev_idx); + mnl_attr_put_u32(rd->nlh, RDMA_NLDEV_ATTR_PORT_INDEX, + rd->port_idx); + mnl_attr_put_u8(rd->nlh, RDMA_NLDEV_ATTR_STAT_HWCOUNTER_DYNAMIC, 1); + + tb_set = mnl_attr_nest_start(rd->nlh, RDMA_NLDEV_ATTR_STAT_HWCOUNTERS); + + opcnt = strtok(rd_argv(rd), ","); + while (opcnt) { + found = false; + mnl_attr_for_each_nested(nla_entry, + tb[RDMA_NLDEV_ATTR_STAT_HWCOUNTERS]) { + struct nlattr *cnt[RDMA_NLDEV_ATTR_MAX] = {}, *nm, *id; + + if (mnl_attr_parse_nested(nla_entry, rd_attr_cb, + cnt) != MNL_CB_OK) + return -EINVAL; + + nm = cnt[RDMA_NLDEV_ATTR_STAT_HWCOUNTER_ENTRY_NAME]; + id = cnt[RDMA_NLDEV_ATTR_STAT_HWCOUNTER_INDEX]; + if (!nm || ! id) + return -EINVAL; + + if (!cnt[RDMA_NLDEV_ATTR_STAT_HWCOUNTER_DYNAMIC]) + continue; + + if (strcmp(opcnt, mnl_attr_get_str(nm)) == 0) { + mnl_attr_put_u32(rd->nlh, + RDMA_NLDEV_ATTR_STAT_HWCOUNTER_INDEX, + mnl_attr_get_u32(id)); + found = true; + } + } + + if (!found) + return -EINVAL; + + opcnt = strtok(NULL, ","); + } + mnl_attr_nest_end(rd->nlh, tb_set); + + return rd_sendrecv_msg(rd, seq); +} + +static int stat_one_set_link(struct rd *rd) +{ + uint32_t seq; + int err; + + if (!rd->port_idx) + return 0; + + err = stat_one_link_get_status_req(rd, &seq); + if (err) + return err; + + return rd_recv_msg(rd, stat_one_set_link_opcounters, rd, seq); +} + +static int stat_set_link(struct rd *rd) +{ + return rd_exec_link(rd, stat_one_set_link, true); +} + +static int stat_set(struct rd *rd) +{ + const struct rd_cmd cmds[] = { + { NULL, stat_help }, + { "link", stat_set_link }, + { "help", stat_help }, + { 0 }, + }; + return rd_exec_cmd(rd, cmds, "parameter"); +} + +static int stat_one_unset_link_opcounters(struct rd *rd) +{ + int flags = NLM_F_REQUEST | NLM_F_ACK; + struct nlattr *tbl; + uint32_t seq; + + if (rd_no_arg(rd)) { + stat_help(rd); + return -EINVAL; + } + + if (strcmpx(rd_argv(rd), "optional-counters") != 0) { + pr_err("Unknown parameter '%s'.\n", rd_argv(rd)); + return -EINVAL; + } + + rd_prepare_msg(rd, RDMA_NLDEV_CMD_STAT_SET, &seq, flags); + mnl_attr_put_u32(rd->nlh, RDMA_NLDEV_ATTR_DEV_INDEX, + rd->dev_idx); + mnl_attr_put_u32(rd->nlh, RDMA_NLDEV_ATTR_PORT_INDEX, + rd->port_idx); + mnl_attr_put_u8(rd->nlh, RDMA_NLDEV_ATTR_STAT_HWCOUNTER_DYNAMIC, 1); + + tbl = mnl_attr_nest_start(rd->nlh, RDMA_NLDEV_ATTR_STAT_HWCOUNTERS); + mnl_attr_nest_end(rd->nlh, tbl); + + return rd_sendrecv_msg(rd, seq); +} + +static int stat_one_unset_link(struct rd *rd) +{ + return stat_one_unset_link_opcounters(rd); +} + +static int stat_unset_link(struct rd *rd) +{ + return rd_exec_link(rd, stat_one_unset_link, true); +} + +static int stat_unset(struct rd *rd) +{ + const struct rd_cmd cmds[] = { + { NULL, stat_help }, + { "link", stat_unset_link }, + { "help", stat_help }, + { 0 }, + }; + return rd_exec_cmd(rd, cmds, "parameter"); +} + static int stat_show_parse_cb(const struct nlmsghdr *nlh, void *data) { struct nlattr *tb[RDMA_NLDEV_ATTR_MAX] = {}; @@ -950,6 +1111,8 @@ int cmd_stat(struct rd *rd) { "qp", stat_qp }, { "mr", stat_mr }, { "mode", stat_mode }, + { "set", stat_set }, + { "unset", stat_unset }, { 0 } };