| Message ID | 20211008002225.2426-12-ansuelsmth@gmail.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Netdev Maintainers |
| Headers | show |
| Series | Multiple improvement for qca8337 switch | expand |
| Context | Check | Description |
|---|---|---|
| netdev/cover_letter | success | Series has a cover letter |
| netdev/fixes_present | success | Fixes tag not required for -next series |
| netdev/patch_count | success | Link |
| netdev/tree_selection | success | Clearly marked for net-next |
| netdev/subject_prefix | success | Link |
| netdev/cc_maintainers | success | CCed 9 of 9 maintainers |
| netdev/source_inline | success | Was 0 now: 0 |
| netdev/verify_signedoff | success | Signed-off-by tag matches author and committer |
| netdev/module_param | success | Was 0 now: 0 |
| netdev/build_32bit | success | Errors and warnings before: 0 this patch: 0 |
| netdev/kdoc | success | Errors and warnings before: 0 this patch: 0 |
| netdev/verify_fixes | success | No Fixes tag |
| netdev/checkpatch | success | total: 0 errors, 0 warnings, 0 checks, 12 lines checked |
| netdev/build_allmodconfig_warn | success | Errors and warnings before: 0 this patch: 0 |
| netdev/header_inline | success | No static functions without inline keyword in header files |
On Fri, Oct 08, 2021 at 02:22:21AM +0200, Ansuel Smith wrote: > Document qca,sgmii-enable-pll binding used in the CPU nodes to > enable SGMII PLL on MAC config. > > Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com> > --- > Documentation/devicetree/bindings/net/dsa/qca8k.txt | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/Documentation/devicetree/bindings/net/dsa/qca8k.txt b/Documentation/devicetree/bindings/net/dsa/qca8k.txt > index 208ee5bc1bbb..b9cccb657373 100644 > --- a/Documentation/devicetree/bindings/net/dsa/qca8k.txt > +++ b/Documentation/devicetree/bindings/net/dsa/qca8k.txt > @@ -50,6 +50,12 @@ A CPU port node has the following optional node: > managed entity. See > Documentation/devicetree/bindings/net/fixed-link.txt > for details. > +- qca,sgmii-enable-pll : For SGMII CPU port, explicitly enable PLL, TX and RX > + chain along with Signal Detection. > + This should NOT be enabled for qca8327. So how about -EINVAL for qca8327, and document it is not valid then. > + This can be required for qca8337 switch with revision 2. Maybe add a warning if enabled with revision < 2? I would not make it an error, because there could be devices manufactured with a mixture or v1 and v2 silicon. Do you have any idea how wide spread v1 is? > + With CPU port set to sgmii and qca8337 it is advised > + to set this unless a communication problem is observed. Andrew
On Sat, Oct 09, 2021 at 07:13:58PM +0200, Andrew Lunn wrote: > On Fri, Oct 08, 2021 at 02:22:21AM +0200, Ansuel Smith wrote: > > Document qca,sgmii-enable-pll binding used in the CPU nodes to > > enable SGMII PLL on MAC config. > > > > Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com> > > --- > > Documentation/devicetree/bindings/net/dsa/qca8k.txt | 6 ++++++ > > 1 file changed, 6 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/net/dsa/qca8k.txt b/Documentation/devicetree/bindings/net/dsa/qca8k.txt > > index 208ee5bc1bbb..b9cccb657373 100644 > > --- a/Documentation/devicetree/bindings/net/dsa/qca8k.txt > > +++ b/Documentation/devicetree/bindings/net/dsa/qca8k.txt > > @@ -50,6 +50,12 @@ A CPU port node has the following optional node: > > managed entity. See > > Documentation/devicetree/bindings/net/fixed-link.txt > > for details. > > +- qca,sgmii-enable-pll : For SGMII CPU port, explicitly enable PLL, TX and RX > > + chain along with Signal Detection. > > + This should NOT be enabled for qca8327. > > So how about -EINVAL for qca8327, and document it is not valid then. > I would also add a warning. With all the ported device we found pll needed only qca8337. I will add the error but also report the reason as we really don't know if it does exist a qca8327 device that needs pll. In theory not but who knows. > > + This can be required for qca8337 switch with revision 2. > > Maybe add a warning if enabled with revision < 2? I would not make it > an error, because there could be devices manufactured with a mixture > or v1 and v2 silicon. Do you have any idea how wide spread v1 is? > No idea about the revision and can't be recovered from the switch data print on the chip. Will add a warning and put in the documentation that we warn when an uncorrect revision is detected. > > + With CPU port set to sgmii and qca8337 it is advised > > + to set this unless a communication problem is observed. > > Andrew
diff --git a/Documentation/devicetree/bindings/net/dsa/qca8k.txt b/Documentation/devicetree/bindings/net/dsa/qca8k.txt index 208ee5bc1bbb..b9cccb657373 100644 --- a/Documentation/devicetree/bindings/net/dsa/qca8k.txt +++ b/Documentation/devicetree/bindings/net/dsa/qca8k.txt @@ -50,6 +50,12 @@ A CPU port node has the following optional node: managed entity. See Documentation/devicetree/bindings/net/fixed-link.txt for details. +- qca,sgmii-enable-pll : For SGMII CPU port, explicitly enable PLL, TX and RX + chain along with Signal Detection. + This should NOT be enabled for qca8327. + This can be required for qca8337 switch with revision 2. + With CPU port set to sgmii and qca8337 it is advised + to set this unless a communication problem is observed. For QCA8K the 'fixed-link' sub-node supports only the following properties:
Document qca,sgmii-enable-pll binding used in the CPU nodes to enable SGMII PLL on MAC config. Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com> --- Documentation/devicetree/bindings/net/dsa/qca8k.txt | 6 ++++++ 1 file changed, 6 insertions(+)