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(c213-102-90-208.bredband.tele2.se. [213.102.90.208]) by smtp.gmail.com with ESMTPSA id g18sm161890lfv.25.2021.11.03.04.55.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Nov 2021 04:55:25 -0700 (PDT) From: =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= To: ast@kernel.org, daniel@iogearbox.net, netdev@vger.kernel.org, bpf@vger.kernel.org, tongtiangen@huawei.com Cc: =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= , luke.r.nels@gmail.com, xi.wang@gmail.com, linux-riscv@lists.infradead.org Subject: [PATCH bpf-next] riscv, bpf: Fix RV32 broken build, and silence RV64 warning Date: Wed, 3 Nov 2021 12:54:53 +0100 Message-Id: <20211103115453.397209-1-bjorn@kernel.org> X-Mailer: git-send-email 2.32.0 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: bpf@iogearbox.net Commit 252c765bd764 ("riscv, bpf: Add BPF exception tables") only addressed RV64, and broke the RV32 build [1]. Fix by gating the exception tables code with CONFIG_ARCH_RV64I. Further, silence a "-Wmissing-prototypes" warning [2] in the RV64 BPF JIT. [1] https://lore.kernel.org/llvm/202111020610.9oy9Rr0G-lkp@intel.com/ [2] https://lore.kernel.org/llvm/202110290334.2zdMyRq4-lkp@intel.com/ Fixes: 252c765bd764 ("riscv, bpf: Add BPF exception tables") Signed-off-by: Björn Töpel Reviewed-by: Tong Tiangen --- Tong/Daniel: The RV32 build has been broken since Thursday. I'll try to fast-track a bit, and commit a quick-fix for it. Hope that's OK with you, Tong! I've verified the build on my machine using riscv32 GCC 9.3.0 and riscv64 GCC 11.2.0. Björn --- arch/riscv/mm/extable.c | 4 ++-- arch/riscv/net/bpf_jit_comp64.c | 2 ++ 2 files changed, 4 insertions(+), 2 deletions(-) base-commit: cc0356d6a02e064387c16a83cb96fe43ef33181e diff --git a/arch/riscv/mm/extable.c b/arch/riscv/mm/extable.c index 18bf338303b6..ddb7d3b99e89 100644 --- a/arch/riscv/mm/extable.c +++ b/arch/riscv/mm/extable.c @@ -11,7 +11,7 @@ #include #include -#ifdef CONFIG_BPF_JIT +#if defined(CONFIG_BPF_JIT) && defined(CONFIG_ARCH_RV64I) int rv_bpf_fixup_exception(const struct exception_table_entry *ex, struct pt_regs *regs); #endif @@ -23,7 +23,7 @@ int fixup_exception(struct pt_regs *regs) if (!fixup) return 0; -#ifdef CONFIG_BPF_JIT +#if defined(CONFIG_BPF_JIT) && defined(CONFIG_ARCH_RV64I) if (regs->epc >= BPF_JIT_REGION_START && regs->epc < BPF_JIT_REGION_END) return rv_bpf_fixup_exception(fixup, regs); #endif diff --git a/arch/riscv/net/bpf_jit_comp64.c b/arch/riscv/net/bpf_jit_comp64.c index 2ca345c7b0bf..f2a779c7e225 100644 --- a/arch/riscv/net/bpf_jit_comp64.c +++ b/arch/riscv/net/bpf_jit_comp64.c @@ -459,6 +459,8 @@ static int emit_call(bool fixed, u64 addr, struct rv_jit_context *ctx) #define BPF_FIXUP_OFFSET_MASK GENMASK(26, 0) #define BPF_FIXUP_REG_MASK GENMASK(31, 27) +int rv_bpf_fixup_exception(const struct exception_table_entry *ex, + struct pt_regs *regs); int rv_bpf_fixup_exception(const struct exception_table_entry *ex, struct pt_regs *regs) {