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Miller" , Jakub Kicinski , Ioana Ciornei , Heiner Kallweit , Russell King , Lars Povlsen , Steen Hegelund , Linus Walleij , Philipp Zabel , Heikki Krogerus , Andy Shevchenko Subject: [RFC PATCH v4 net-next 14/23] pinctrl: microchip-sgpio: update to support regmap Date: Mon, 15 Nov 2021 22:23:19 -0800 Message-Id: <20211116062328.1949151-15-colin.foster@in-advantage.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211116062328.1949151-1-colin.foster@in-advantage.com> References: <20211116062328.1949151-1-colin.foster@in-advantage.com> X-ClientProxiedBy: MWHPR11CA0028.namprd11.prod.outlook.com (2603:10b6:300:115::14) To MWHPR1001MB2351.namprd10.prod.outlook.com (2603:10b6:301:35::37) MIME-Version: 1.0 Received: from localhost.localdomain (67.185.175.147) by MWHPR11CA0028.namprd11.prod.outlook.com (2603:10b6:300:115::14) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4690.26 via Frontend Transport; Tue, 16 Nov 2021 06:23:52 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 25c95e5f-8e39-4057-47e1-08d9a8c9a949 X-MS-TrafficTypeDiagnostic: CO1PR10MB4722: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:1824; 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u32 ports; u32 clock; - u32 __iomem *regs; + struct regmap *regs; + u32 regs_offset; const struct sgpio_properties *properties; }; @@ -136,29 +138,32 @@ static inline int sgpio_addr_to_pin(struct sgpio_priv *priv, int port, int bit) static inline u32 sgpio_readl(struct sgpio_priv *priv, u32 rno, u32 off) { - u32 __iomem *reg = &priv->regs[priv->properties->regoff[rno] + off]; + u32 val = 0; + + regmap_read(priv->regs, + priv->properties->regoff[rno] + off + priv->regs_offset, + &val); - return readl(reg); + return val; } static inline void sgpio_writel(struct sgpio_priv *priv, u32 val, u32 rno, u32 off) { - u32 __iomem *reg = &priv->regs[priv->properties->regoff[rno] + off]; - - writel(val, reg); + regmap_write(priv->regs, + priv->properties->regoff[rno] + off + priv->regs_offset, + val); } static inline void sgpio_clrsetbits(struct sgpio_priv *priv, u32 rno, u32 off, u32 clear, u32 set) { - u32 __iomem *reg = &priv->regs[priv->properties->regoff[rno] + off]; - u32 val = readl(reg); + u32 val = sgpio_readl(priv, rno, off); val &= ~clear; val |= set; - writel(val, reg); + sgpio_writel(priv, val, rno, off); } static inline void sgpio_configure_bitstream(struct sgpio_priv *priv) @@ -807,7 +812,13 @@ static int microchip_sgpio_probe(struct platform_device *pdev) struct reset_control *reset; struct sgpio_priv *priv; struct clk *clk; + u32 __iomem *regs; u32 val; + struct regmap_config regmap_config = { + .reg_bits = 32, + .val_bits = 32, + .reg_stride = 4, + }; priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); if (!priv) @@ -832,9 +843,15 @@ static int microchip_sgpio_probe(struct platform_device *pdev) return -EINVAL; } - priv->regs = devm_platform_ioremap_resource(pdev, 0); + regs = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(regs)) + return PTR_ERR(regs); + + priv->regs = devm_regmap_init_mmio(dev, regs, ®map_config); if (IS_ERR(priv->regs)) return PTR_ERR(priv->regs); + + priv->regs_offset = 0; priv->properties = device_get_match_data(dev); priv->in.is_input = true;