| Message ID | 20211118144011.10921-1-matthias.schiffer@ew.tq-group.com (mailing list archive) |
|---|---|
| State | Awaiting Upstream |
| Delegated to: | Netdev Maintainers |
| Headers | show |
| Series | [net] can: m_can: pci: fix iomap_read_fifo() and iomap_write_fifo() | expand |
On 11/18/21 4:40 PM, Matthias Schiffer wrote: > The same fix that was previously done in m_can_platform in commit > 99d173fbe894 ("can: m_can: fix iomap_read_fifo() and iomap_write_fifo()") > is required in m_can_pci as well to make iomap_read_fifo() and > iomap_write_fifo() work for val_count > 1. > > Fixes: 812270e5445b ("can: m_can: Batch FIFO writes during CAN transmit") > Fixes: 1aa6772f64b4 ("can: m_can: Batch FIFO reads during CAN receive") > Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> > --- > drivers/net/can/m_can/m_can_pci.c | 14 ++++++++++++-- > 1 file changed, 12 insertions(+), 2 deletions(-) > I tested this on top of plain v5.15 (v5.16-rc1 has some rootfs regression on my EHL HW) where my test case was receiving zeros and this makes it working again like in v5.14 and earlier. Tested-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
diff --git a/drivers/net/can/m_can/m_can_pci.c b/drivers/net/can/m_can/m_can_pci.c index 8bbbaa264f0d..b56a54d6c5a9 100644 --- a/drivers/net/can/m_can/m_can_pci.c +++ b/drivers/net/can/m_can/m_can_pci.c @@ -47,8 +47,13 @@ static u32 iomap_read_reg(struct m_can_classdev *cdev, int reg) static int iomap_read_fifo(struct m_can_classdev *cdev, int offset, void *val, size_t val_count) { struct m_can_pci_priv *priv = cdev_to_priv(cdev); + void __iomem *src = priv->base + offset; - ioread32_rep(priv->base + offset, val, val_count); + while (val_count--) { + *(unsigned int *)val = ioread32(src); + val += 4; + src += 4; + } return 0; } @@ -66,8 +71,13 @@ static int iomap_write_fifo(struct m_can_classdev *cdev, int offset, const void *val, size_t val_count) { struct m_can_pci_priv *priv = cdev_to_priv(cdev); + void __iomem *dst = priv->base + offset; - iowrite32_rep(priv->base + offset, val, val_count); + while (val_count--) { + iowrite32(*(unsigned int *)val, dst); + val += 4; + dst += 4; + } return 0; }
The same fix that was previously done in m_can_platform in commit 99d173fbe894 ("can: m_can: fix iomap_read_fifo() and iomap_write_fifo()") is required in m_can_pci as well to make iomap_read_fifo() and iomap_write_fifo() work for val_count > 1. Fixes: 812270e5445b ("can: m_can: Batch FIFO writes during CAN transmit") Fixes: 1aa6772f64b4 ("can: m_can: Batch FIFO reads during CAN receive") Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> --- drivers/net/can/m_can/m_can_pci.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-)