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[187.49.235.234]) by smtp.gmail.com with ESMTPSA id f11sm6423357qko.84.2021.12.18.00.15.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Dec 2021 00:15:25 -0800 (PST) From: Luiz Angelo Daros de Luca To: netdev@vger.kernel.org Cc: linus.walleij@linaro.org, andrew@lunn.ch, vivien.didelot@gmail.com, f.fainelli@gmail.com, olteanv@gmail.com, alsi@bang-olufsen.dk, arinc.unal@arinc9.com, Luiz Angelo Daros de Luca Subject: [PATCH net-next v2 11/13] net: dsa: realtek: rtl8365mb: use DSA CPU port Date: Sat, 18 Dec 2021 05:14:23 -0300 Message-Id: <20211218081425.18722-12-luizluca@gmail.com> X-Mailer: git-send-email 2.34.0 In-Reply-To: <20211218081425.18722-1-luizluca@gmail.com> References: <20211216201342.25587-1-luizluca@gmail.com> <20211218081425.18722-1-luizluca@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Instead of a fixed CPU port, assume that DSA is correct. Tested-by: Arınç ÜNAL Signed-off-by: Luiz Angelo Daros de Luca --- drivers/net/dsa/realtek/rtl8365mb.c | 23 ++++++++++++++--------- 1 file changed, 14 insertions(+), 9 deletions(-) diff --git a/drivers/net/dsa/realtek/rtl8365mb.c b/drivers/net/dsa/realtek/rtl8365mb.c index a8f44538a87a..b79a4639b283 100644 --- a/drivers/net/dsa/realtek/rtl8365mb.c +++ b/drivers/net/dsa/realtek/rtl8365mb.c @@ -103,14 +103,13 @@ /* Chip-specific data and limits */ #define RTL8365MB_CHIP_ID_8365MB_VC 0x6367 -#define RTL8365MB_CPU_PORT_NUM_8365MB_VC 6 #define RTL8365MB_LEARN_LIMIT_MAX_8365MB_VC 2112 /* Family-specific data and limits */ #define RTL8365MB_PHYADDRMAX 7 #define RTL8365MB_NUM_PHYREGS 32 #define RTL8365MB_PHYREGMAX (RTL8365MB_NUM_PHYREGS - 1) -#define RTL8365MB_MAX_NUM_PORTS (RTL8365MB_CPU_PORT_NUM_8365MB_VC + 1) +#define RTL8365MB_MAX_NUM_PORTS 7 /* Chip identification registers */ #define RTL8365MB_CHIP_ID_REG 0x1300 @@ -1827,9 +1826,18 @@ static int rtl8365mb_setup(struct dsa_switch *ds) dev_info(priv->dev, "no interrupt support\n"); /* Configure CPU tagging */ - ret = rtl8365mb_cpu_config(priv); - if (ret) - goto out_teardown_irq; + for (i = 0; i < priv->num_ports; i++) { + if (!(dsa_is_cpu_port(priv->ds, i))) + continue; + priv->cpu_port = i; + mb->cpu.mask = BIT(priv->cpu_port); + mb->cpu.trap_port = priv->cpu_port; + ret = rtl8365mb_cpu_config(priv); + if (ret) + goto out_teardown_irq; + + break; + } /* Configure ports */ for (i = 0; i < priv->num_ports; i++) { @@ -1960,8 +1968,7 @@ static int rtl8365mb_detect(struct realtek_priv *priv) "found an RTL8365MB-VC switch (ver=0x%04x)\n", chip_ver); - priv->cpu_port = RTL8365MB_CPU_PORT_NUM_8365MB_VC; - priv->num_ports = priv->cpu_port + 1; + priv->num_ports = RTL8365MB_MAX_NUM_PORTS; mb->priv = priv; mb->chip_id = chip_id; @@ -1972,8 +1979,6 @@ static int rtl8365mb_detect(struct realtek_priv *priv) mb->jam_size = ARRAY_SIZE(rtl8365mb_init_jam_8365mb_vc); mb->cpu.enable = 1; - mb->cpu.mask = BIT(priv->cpu_port); - mb->cpu.trap_port = priv->cpu_port; mb->cpu.insert = RTL8365MB_CPU_INSERT_TO_ALL; mb->cpu.position = RTL8365MB_CPU_POS_AFTER_SA; mb->cpu.rx_length = RTL8365MB_CPU_RXLEN_64BYTES;