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Miller" , =?utf-8?b?SsOpcsO0bWUgUG91aWxsZXI=?= Subject: [PATCH 15/31] staging: wfx: prefix functions from hwio.h with wfx_ Date: Thu, 13 Jan 2022 09:55:08 +0100 Message-Id: <20220113085524.1110708-16-Jerome.Pouiller@silabs.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220113085524.1110708-1-Jerome.Pouiller@silabs.com> References: <20220113085524.1110708-1-Jerome.Pouiller@silabs.com> X-ClientProxiedBy: SA0PR11CA0117.namprd11.prod.outlook.com (2603:10b6:806:d1::32) To PH0PR11MB5657.namprd11.prod.outlook.com (2603:10b6:510:ee::19) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 1759edbb-cd2b-4276-3b70-08d9d6728992 X-MS-TrafficTypeDiagnostic: BY5PR11MB4040:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:1107; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 7Nht9UqGn11bqTwiK5RMX1Tlw5hR4jWWHK2FWgqWuQV/8ZxgTbhLr+O/eVddMrXk9V8fbeWtkNzZoHXwctYT3uGvEpW1QPRublKaRhxXnI7ge28RMzBJCiCHKbpsRvB7WQBYJeNC27bhyL+eHYT/MAoHAb/yln/BdNy/EtRAKgS726Shr60PkvR85SEBGfnquKqSgXPLi8elF5JSGjZyYpJyDqeHliSMDat/sTtPasxCc0XrrmVcOkN7C2RqlvPuVEqiwqef4Dp1ej+VaURU1vozw+8MBnhuYUdLyH7Snons+i8mnbaRTqO3zG30KK+XUxgZ/u98rUlZYbGixXZvxNxI0isvVattr79YNUsMLtmnb68mIpxheLVPdBKxV9EXgRlYFp3L1fgjwChceq+88ZdTK8w3ssgD9gJ6XpF9zxS7mkoFVSepsMKfetAka0wzrN7MtLtN5jrnlptmf9JisuIldRoDPL+3aCKOXEDMbXUuUIlBoWRlDzhEVTWhyHhyzrvrqIWzBRUzz12GiVHaFeXkcLm4kgF5JmjyUMF1AiG4HLX2QPiYfWxoc8V5Cs9WFYgnjyuIDszIkLff9Dtjw6F9BA5PU1z7Iwk2hKgYGSiT6WLxvktgRnOip7hIe11vZlLkULNoNYs5yIb8keP1MQ== X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:PH0PR11MB5657.namprd11.prod.outlook.com;PTR:;CAT:NONE;SFS:(366004)(6506007)(508600001)(186003)(38100700002)(30864003)(4326008)(8936002)(6512007)(66946007)(83380400001)(1076003)(2616005)(54906003)(86362001)(66556008)(2906002)(66476007)(316002)(52116002)(36756003)(5660300002)(66574015)(8676002)(6486002)(107886003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?q?0HxEZb8fD1VcHbaJMSd/+eRTgM3A?= =?utf-8?q?JPC7Ae3EeavHyqGFWJSZAF8IGwfNoOL+0RDLKJEFYT+uK9b2wFqhzFst4N7jo2uVI?= =?utf-8?q?/MDh6zRG0Zjv0IE86r9+NuvMJCVHTltRphAumQat+3mBuyDaHKNjEAVhasNNgy0zZ?= =?utf-8?q?DW324Md3+mRbpzuGxYp4GrbSWpGdvNMXCcSaH6yD3VpDZyryLBJ74Flrm32IHCIln?= =?utf-8?q?MHn8fRB45sXSjXZKWdHkkrqXH1LpJuiAyohRUP7oWHO7xk3N0yWzEoFWpW5Ty0awW?= =?utf-8?q?QYD08TEuOofG7FG54PPXcX7B2JFs9xEAY1fR261C1Vmz9M9AsGxmn4vhq4K7Z3F6D?= =?utf-8?q?v/2fb2twO5B7GRBSauiV4BRWRgHK75r1secx5ADXPgG6uK9XUzI/DItgNGSXwRC5j?= =?utf-8?q?SaT0aipnVOMjAgiHHie6Jp1Sd21U36h+DA5Z5zGdW8Mh5dP+5rT5FxuboFTzKJ7ZD?= =?utf-8?q?JHAQ+X34nNsRLkiHCgkDm+AFesBPH155vgoI8/cPDQyIFYzNWVO5F/lLrpri+OH26?= =?utf-8?q?gdEu1aAlNiul2LlHqyxl+aupcwAMzhR5l8bxHhxcVVS/tIataECjBJPVdyJpaAaER?= =?utf-8?q?1HSGJ9W/1qSQlDV/W+Wi0Gj22ejs1fUd7HI4NwfnOCXILBCT1WzFjM8sFndoaUvxn?= =?utf-8?q?54/bHAhDVWdYxAPjccQl9dThvSQd5Qny/VO6ayTOZQHknLf5E2mMfsYbnMJr406FM?= =?utf-8?q?WGdK5OiUCit3REaicUXat8B4UaXbUt5wZHgQWwZqbN9PnyJNe9FkdNYFtyNEtA0DM?= =?utf-8?q?d8iWsK35XNZsJIDhOxfNdvZcQzB0ae7C83H0fYTZBcxVCNSwkBCRjBAtvYzixeqgb?= =?utf-8?q?FRND72HXgUKYqLEPxOyUFk9nbMwbk1b5cjuDwpyVA0Lja1zq2hmJkue1jiPRTMJIe?= =?utf-8?q?ogvJ/Htqw72/h2JxRFBFhFyMv3nrZUCN9GM9jjx0cUU0605h705VUh1z6dUklqtnX?= =?utf-8?q?hCxjyWw4z/sg2RuGwqU4ARL8n5ZoZz9tU7Fb9Ny7sB9CpVUGEaUWriWqupPQDthMI?= =?utf-8?q?uP5brPp7hu7E7WamuZH60rYg+mPNlXCX3+OE4hDJVNR7C2YU03uYclXZ1fJrd2zQu?= =?utf-8?q?Y1AUD3unujWNaXBpYwzO7JeU9Utfm/qaPkQWRIlxKI4LUleCVNt4Tw2lbkkOWJXlv?= =?utf-8?q?RV/S5cDqSUe9FWloiaxydYEYXUe0FM6Dw2wVHbydLqqDDgG5qICuDoBFDiP+vyjS9?= =?utf-8?q?grbOcwXW50HlBRygy9I5srPdJPB8QC6dNeBntlq/kaykiXDvkMr7eiMcq+0CywSQr?= =?utf-8?q?LVLvwRn2b1djvgSjerU3mdZvH7YMbPzTB9OaxMIKIedoVeqdSn7J4zvrA0IcScOYz?= =?utf-8?q?IECmeWKACBJmU1io+V/VJQIciRpG4STxOHaSgOFySLL8l5BMq4YJ00iKDTvBmU5ps?= =?utf-8?q?9CAV1/rAIvHXYWIbYgdkObUmDtoPFPDYDr1wo6z0m+AZ6cT//17J+lhh3koDVNAen?= =?utf-8?q?WSXllIyvfSyv3b9sICPfwrh04WnWaSeezZ5CcJyI4tc/KZKKInyPOs4pUQ7tWad1R?= =?utf-8?q?BfRBXq2R1yo809LzeWKsiiRckV/ZPvZ4v6O+PeokpzE6RvmmMTcED3bvaHZP6alak?= =?utf-8?q?L97YeNpAHTNTKnagScXp6QPEM7c1rhtnuESYfoK/JfIcnwaDcmg/Sw=3D?= X-OriginatorOrg: silabs.com X-MS-Exchange-CrossTenant-Network-Message-Id: 1759edbb-cd2b-4276-3b70-08d9d6728992 X-MS-Exchange-CrossTenant-AuthSource: PH0PR11MB5657.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Jan 2022 08:56:07.4813 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 54dbd822-5231-4b20-944d-6f4abcd541fb X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: ycRdDbSm/gDa/wFWidph8bwLSHhYsefd1Yo8lgf8NEo8yzkyWH9srNuFrwhHeE77PVtr4bcqdX8jLl+8aPPfSQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR11MB4040 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org From: Jérôme Pouiller All the functions related to a driver should use the same prefix. Signed-off-by: Jérôme Pouiller --- drivers/staging/wfx/bh.c | 8 +-- drivers/staging/wfx/fwio.c | 78 ++++++++++---------- drivers/staging/wfx/hif_tx.c | 2 +- drivers/staging/wfx/hwio.c | 135 +++++++++++++++++++---------------- drivers/staging/wfx/hwio.h | 32 ++++----- drivers/staging/wfx/main.c | 2 +- 6 files changed, 133 insertions(+), 124 deletions(-) diff --git a/drivers/staging/wfx/bh.c b/drivers/staging/wfx/bh.c index bbcf8d6a39c4..b7fa0aeafd78 100644 --- a/drivers/staging/wfx/bh.c +++ b/drivers/staging/wfx/bh.c @@ -227,11 +227,11 @@ static void ack_sdio_data(struct wfx_dev *wdev) { u32 cfg_reg; - config_reg_read(wdev, &cfg_reg); + wfx_config_reg_read(wdev, &cfg_reg); if (cfg_reg & 0xFF) { dev_warn(wdev->dev, "chip reports errors: %02x\n", cfg_reg & 0xFF); - config_reg_write_bits(wdev, 0xFF, 0x00); + wfx_config_reg_write_bits(wdev, 0xFF, 0x00); } } @@ -270,7 +270,7 @@ void wfx_bh_request_rx(struct wfx_dev *wdev) { u32 cur, prev; - control_reg_read(wdev, &cur); + wfx_control_reg_read(wdev, &cur); prev = atomic_xchg(&wdev->hif.ctrl_reg, cur); complete(&wdev->hif.ctrl_ready); queue_work(system_highpri_wq, &wdev->hif.bh); @@ -304,7 +304,7 @@ void wfx_bh_poll_irq(struct wfx_dev *wdev) WARN(!wdev->poll_irq, "unexpected IRQ polling can mask IRQ"); start = ktime_get(); for (;;) { - control_reg_read(wdev, ®); + wfx_control_reg_read(wdev, ®); now = ktime_get(); if (reg & 0xFFF) break; diff --git a/drivers/staging/wfx/fwio.c b/drivers/staging/wfx/fwio.c index 98a9391b2bee..c9a54c519e8a 100644 --- a/drivers/staging/wfx/fwio.c +++ b/drivers/staging/wfx/fwio.c @@ -79,8 +79,8 @@ static const char * const fwio_errors[] = { * NOTE: it may also be possible to use 'pages' from struct firmware and avoid * bounce buffer */ -static int sram_write_dma_safe(struct wfx_dev *wdev, u32 addr, const u8 *buf, - size_t len) +static int wfx_sram_write_dma_safe(struct wfx_dev *wdev, u32 addr, + const u8 *buf, size_t len) { int ret; const u8 *tmp; @@ -92,7 +92,7 @@ static int sram_write_dma_safe(struct wfx_dev *wdev, u32 addr, const u8 *buf, } else { tmp = buf; } - ret = sram_buf_write(wdev, addr, tmp, len); + ret = wfx_sram_buf_write(wdev, addr, tmp, len); if (tmp != buf) kfree(tmp); return ret; @@ -156,7 +156,7 @@ static int wait_ncp_status(struct wfx_dev *wdev, u32 status) start = ktime_get(); for (;;) { - ret = sram_reg_read(wdev, WFX_DCA_NCP_STATUS, ®); + ret = wfx_sram_reg_read(wdev, WFX_DCA_NCP_STATUS, ®); if (ret < 0) return -EIO; now = ktime_get(); @@ -192,7 +192,7 @@ static int upload_firmware(struct wfx_dev *wdev, const u8 *data, size_t len) break; if (ktime_after(now, ktime_add_ms(start, DCA_TIMEOUT))) return -ETIMEDOUT; - ret = sram_reg_read(wdev, WFX_DCA_GET, &bytes_done); + ret = wfx_sram_reg_read(wdev, WFX_DCA_GET, &bytes_done); if (ret < 0) return ret; } @@ -200,9 +200,9 @@ static int upload_firmware(struct wfx_dev *wdev, const u8 *data, size_t len) dev_dbg(wdev->dev, "answer after %lldus\n", ktime_us_delta(now, start)); - ret = sram_write_dma_safe(wdev, WFX_DNLD_FIFO + - (offs % DNLD_FIFO_SIZE), - data + offs, DNLD_BLOCK_SIZE); + ret = wfx_sram_write_dma_safe(wdev, + WFX_DNLD_FIFO + (offs % DNLD_FIFO_SIZE), + data + offs, DNLD_BLOCK_SIZE); if (ret < 0) return ret; @@ -210,7 +210,7 @@ static int upload_firmware(struct wfx_dev *wdev, const u8 *data, size_t len) * during first loop */ offs += DNLD_BLOCK_SIZE; - ret = sram_reg_write(wdev, WFX_DCA_PUT, offs); + ret = wfx_sram_reg_write(wdev, WFX_DCA_PUT, offs); if (ret < 0) return ret; } @@ -221,10 +221,10 @@ static void print_boot_status(struct wfx_dev *wdev) { u32 reg; - sram_reg_read(wdev, WFX_STATUS_INFO, ®); + wfx_sram_reg_read(wdev, WFX_STATUS_INFO, ®); if (reg == 0x12345678) return; - sram_reg_read(wdev, WFX_ERR_INFO, ®); + wfx_sram_reg_read(wdev, WFX_ERR_INFO, ®); if (reg < ARRAY_SIZE(fwio_errors) && fwio_errors[reg]) dev_info(wdev->dev, "secure boot: %s\n", fwio_errors[reg]); else @@ -245,36 +245,36 @@ static int load_firmware_secure(struct wfx_dev *wdev) if (!buf) return -ENOMEM; - sram_reg_write(wdev, WFX_DCA_HOST_STATUS, HOST_READY); + wfx_sram_reg_write(wdev, WFX_DCA_HOST_STATUS, HOST_READY); ret = wait_ncp_status(wdev, NCP_INFO_READY); if (ret) goto error; - sram_buf_read(wdev, WFX_BOOTLOADER_LABEL, buf, BOOTLOADER_LABEL_SIZE); + wfx_sram_buf_read(wdev, WFX_BOOTLOADER_LABEL, buf, BOOTLOADER_LABEL_SIZE); buf[BOOTLOADER_LABEL_SIZE] = 0; dev_dbg(wdev->dev, "bootloader: \"%s\"\n", buf); - sram_buf_read(wdev, WFX_PTE_INFO, buf, PTE_INFO_SIZE); + wfx_sram_buf_read(wdev, WFX_PTE_INFO, buf, PTE_INFO_SIZE); ret = get_firmware(wdev, buf[PTE_INFO_KEYSET_IDX], &fw, &fw_offset); if (ret) goto error; header_size = fw_offset + FW_SIGNATURE_SIZE + FW_HASH_SIZE; - sram_reg_write(wdev, WFX_DCA_HOST_STATUS, HOST_INFO_READ); + wfx_sram_reg_write(wdev, WFX_DCA_HOST_STATUS, HOST_INFO_READ); ret = wait_ncp_status(wdev, NCP_READY); if (ret) goto error; - sram_reg_write(wdev, WFX_DNLD_FIFO, 0xFFFFFFFF); /* Fifo init */ - sram_write_dma_safe(wdev, WFX_DCA_FW_VERSION, "\x01\x00\x00\x00", - FW_VERSION_SIZE); - sram_write_dma_safe(wdev, WFX_DCA_FW_SIGNATURE, fw->data + fw_offset, - FW_SIGNATURE_SIZE); - sram_write_dma_safe(wdev, WFX_DCA_FW_HASH, - fw->data + fw_offset + FW_SIGNATURE_SIZE, - FW_HASH_SIZE); - sram_reg_write(wdev, WFX_DCA_IMAGE_SIZE, fw->size - header_size); - sram_reg_write(wdev, WFX_DCA_HOST_STATUS, HOST_UPLOAD_PENDING); + wfx_sram_reg_write(wdev, WFX_DNLD_FIFO, 0xFFFFFFFF); /* Fifo init */ + wfx_sram_write_dma_safe(wdev, WFX_DCA_FW_VERSION, "\x01\x00\x00\x00", + FW_VERSION_SIZE); + wfx_sram_write_dma_safe(wdev, WFX_DCA_FW_SIGNATURE, fw->data + fw_offset, + FW_SIGNATURE_SIZE); + wfx_sram_write_dma_safe(wdev, WFX_DCA_FW_HASH, + fw->data + fw_offset + FW_SIGNATURE_SIZE, + FW_HASH_SIZE); + wfx_sram_reg_write(wdev, WFX_DCA_IMAGE_SIZE, fw->size - header_size); + wfx_sram_reg_write(wdev, WFX_DCA_HOST_STATUS, HOST_UPLOAD_PENDING); ret = wait_ncp_status(wdev, NCP_DOWNLOAD_PENDING); if (ret) goto error; @@ -287,14 +287,14 @@ static int load_firmware_secure(struct wfx_dev *wdev) dev_dbg(wdev->dev, "firmware load after %lldus\n", ktime_us_delta(ktime_get(), start)); - sram_reg_write(wdev, WFX_DCA_HOST_STATUS, HOST_UPLOAD_COMPLETE); + wfx_sram_reg_write(wdev, WFX_DCA_HOST_STATUS, HOST_UPLOAD_COMPLETE); ret = wait_ncp_status(wdev, NCP_AUTH_OK); /* Legacy ROM support */ if (ret < 0) ret = wait_ncp_status(wdev, NCP_PUB_KEY_RDY); if (ret < 0) goto error; - sram_reg_write(wdev, WFX_DCA_HOST_STATUS, HOST_OK_TO_JUMP); + wfx_sram_reg_write(wdev, WFX_DCA_HOST_STATUS, HOST_OK_TO_JUMP); error: kfree(buf); @@ -320,8 +320,8 @@ static int init_gpr(struct wfx_dev *wdev) }; for (i = 0; i < ARRAY_SIZE(gpr_init); i++) { - ret = igpr_reg_write(wdev, gpr_init[i].index, - gpr_init[i].value); + ret = wfx_igpr_reg_write(wdev, gpr_init[i].index, + gpr_init[i].value); if (ret < 0) return ret; dev_dbg(wdev->dev, " index %02x: %08x\n", @@ -341,13 +341,13 @@ int wfx_init_device(struct wfx_dev *wdev) reg = CFG_DIRECT_ACCESS_MODE | CFG_CPU_RESET | CFG_BYTE_ORDER_ABCD; if (wdev->pdata.use_rising_clk) reg |= CFG_CLK_RISE_EDGE; - ret = config_reg_write(wdev, reg); + ret = wfx_config_reg_write(wdev, reg); if (ret < 0) { dev_err(wdev->dev, "bus returned an error during first write access. Host configuration error?\n"); return -EIO; } - ret = config_reg_read(wdev, ®); + ret = wfx_config_reg_read(wdev, ®); if (ret < 0) { dev_err(wdev->dev, "bus returned an error during first read access. Bus configuration error?\n"); return -EIO; @@ -374,12 +374,12 @@ int wfx_init_device(struct wfx_dev *wdev) if (ret < 0) return ret; - ret = control_reg_write(wdev, CTRL_WLAN_WAKEUP); + ret = wfx_control_reg_write(wdev, CTRL_WLAN_WAKEUP); if (ret < 0) return -EIO; start = ktime_get(); for (;;) { - ret = control_reg_read(wdev, ®); + ret = wfx_control_reg_read(wdev, ®); now = ktime_get(); if (reg & CTRL_WLAN_READY) break; @@ -391,15 +391,15 @@ int wfx_init_device(struct wfx_dev *wdev) dev_dbg(wdev->dev, "chip wake up after %lldus\n", ktime_us_delta(now, start)); - ret = config_reg_write_bits(wdev, CFG_CPU_RESET, 0); + ret = wfx_config_reg_write_bits(wdev, CFG_CPU_RESET, 0); if (ret < 0) return ret; ret = load_firmware_secure(wdev); if (ret < 0) return ret; - return config_reg_write_bits(wdev, - CFG_DIRECT_ACCESS_MODE | - CFG_IRQ_ENABLE_DATA | - CFG_IRQ_ENABLE_WRDY, - CFG_IRQ_ENABLE_DATA); + return wfx_config_reg_write_bits(wdev, + CFG_DIRECT_ACCESS_MODE | + CFG_IRQ_ENABLE_DATA | + CFG_IRQ_ENABLE_WRDY, + CFG_IRQ_ENABLE_DATA); } diff --git a/drivers/staging/wfx/hif_tx.c b/drivers/staging/wfx/hif_tx.c index 7c9d3d86c22e..9899e7b62203 100644 --- a/drivers/staging/wfx/hif_tx.c +++ b/drivers/staging/wfx/hif_tx.c @@ -135,7 +135,7 @@ int wfx_hif_shutdown(struct wfx_dev *wdev) if (wdev->pdata.gpio_wakeup) gpiod_set_value(wdev->pdata.gpio_wakeup, 0); else - control_reg_write(wdev, 0); + wfx_control_reg_write(wdev, 0); kfree(hif); return ret; } diff --git a/drivers/staging/wfx/hwio.c b/drivers/staging/wfx/hwio.c index 977b9325f496..c53b36d36687 100644 --- a/drivers/staging/wfx/hwio.c +++ b/drivers/staging/wfx/hwio.c @@ -17,7 +17,7 @@ #define WFX_HIF_BUFFER_SIZE 0x2000 -static int read32(struct wfx_dev *wdev, int reg, u32 *val) +static int wfx_read32(struct wfx_dev *wdev, int reg, u32 *val) { int ret; __le32 *tmp = kmalloc(sizeof(u32), GFP_KERNEL); @@ -36,7 +36,7 @@ static int read32(struct wfx_dev *wdev, int reg, u32 *val) return ret; } -static int write32(struct wfx_dev *wdev, int reg, u32 val) +static int wfx_write32(struct wfx_dev *wdev, int reg, u32 val) { int ret; __le32 *tmp = kmalloc(sizeof(u32), GFP_KERNEL); @@ -53,29 +53,30 @@ static int write32(struct wfx_dev *wdev, int reg, u32 val) return ret; } -static int read32_locked(struct wfx_dev *wdev, int reg, u32 *val) +static int wfx_read32_locked(struct wfx_dev *wdev, int reg, u32 *val) { int ret; wdev->hwbus_ops->lock(wdev->hwbus_priv); - ret = read32(wdev, reg, val); + ret = wfx_read32(wdev, reg, val); _trace_io_read32(reg, *val); wdev->hwbus_ops->unlock(wdev->hwbus_priv); return ret; } -static int write32_locked(struct wfx_dev *wdev, int reg, u32 val) +static int wfx_write32_locked(struct wfx_dev *wdev, int reg, u32 val) { int ret; wdev->hwbus_ops->lock(wdev->hwbus_priv); - ret = write32(wdev, reg, val); + ret = wfx_write32(wdev, reg, val); _trace_io_write32(reg, val); wdev->hwbus_ops->unlock(wdev->hwbus_priv); return ret; } -static int write32_bits_locked(struct wfx_dev *wdev, int reg, u32 mask, u32 val) +static int wfx_write32_bits_locked(struct wfx_dev *wdev, + int reg, u32 mask, u32 val) { int ret; u32 val_r, val_w; @@ -83,13 +84,13 @@ static int write32_bits_locked(struct wfx_dev *wdev, int reg, u32 mask, u32 val) WARN_ON(~mask & val); val &= mask; wdev->hwbus_ops->lock(wdev->hwbus_priv); - ret = read32(wdev, reg, &val_r); + ret = wfx_read32(wdev, reg, &val_r); _trace_io_read32(reg, val_r); if (ret < 0) goto err; val_w = (val_r & ~mask) | val; if (val_w != val_r) { - ret = write32(wdev, reg, val_w); + ret = wfx_write32(wdev, reg, val_w); _trace_io_write32(reg, val_w); } err: @@ -97,8 +98,8 @@ static int write32_bits_locked(struct wfx_dev *wdev, int reg, u32 mask, u32 val) return ret; } -static int indirect_read(struct wfx_dev *wdev, int reg, u32 addr, - void *buf, size_t len) +static int wfx_indirect_read(struct wfx_dev *wdev, int reg, u32 addr, + void *buf, size_t len) { int ret; int i; @@ -115,20 +116,20 @@ static int indirect_read(struct wfx_dev *wdev, int reg, u32 addr, else return -ENODEV; - ret = write32(wdev, WFX_REG_BASE_ADDR, addr); + ret = wfx_write32(wdev, WFX_REG_BASE_ADDR, addr); if (ret < 0) goto err; - ret = read32(wdev, WFX_REG_CONFIG, &cfg); + ret = wfx_read32(wdev, WFX_REG_CONFIG, &cfg); if (ret < 0) goto err; - ret = write32(wdev, WFX_REG_CONFIG, cfg | prefetch); + ret = wfx_write32(wdev, WFX_REG_CONFIG, cfg | prefetch); if (ret < 0) goto err; for (i = 0; i < 20; i++) { - ret = read32(wdev, WFX_REG_CONFIG, &cfg); + ret = wfx_read32(wdev, WFX_REG_CONFIG, &cfg); if (ret < 0) goto err; if (!(cfg & prefetch)) @@ -148,46 +149,46 @@ static int indirect_read(struct wfx_dev *wdev, int reg, u32 addr, return ret; } -static int indirect_write(struct wfx_dev *wdev, int reg, u32 addr, - const void *buf, size_t len) +static int wfx_indirect_write(struct wfx_dev *wdev, int reg, u32 addr, + const void *buf, size_t len) { int ret; WARN_ON(len >= WFX_HIF_BUFFER_SIZE); WARN_ON(reg != WFX_REG_AHB_DPORT && reg != WFX_REG_SRAM_DPORT); - ret = write32(wdev, WFX_REG_BASE_ADDR, addr); + ret = wfx_write32(wdev, WFX_REG_BASE_ADDR, addr); if (ret < 0) return ret; return wdev->hwbus_ops->copy_to_io(wdev->hwbus_priv, reg, buf, len); } -static int indirect_read_locked(struct wfx_dev *wdev, int reg, u32 addr, - void *buf, size_t len) +static int wfx_indirect_read_locked(struct wfx_dev *wdev, int reg, u32 addr, + void *buf, size_t len) { int ret; wdev->hwbus_ops->lock(wdev->hwbus_priv); - ret = indirect_read(wdev, reg, addr, buf, len); + ret = wfx_indirect_read(wdev, reg, addr, buf, len); _trace_io_ind_read(reg, addr, buf, len); wdev->hwbus_ops->unlock(wdev->hwbus_priv); return ret; } -static int indirect_write_locked(struct wfx_dev *wdev, int reg, u32 addr, - const void *buf, size_t len) +static int wfx_indirect_write_locked(struct wfx_dev *wdev, int reg, u32 addr, + const void *buf, size_t len) { int ret; wdev->hwbus_ops->lock(wdev->hwbus_priv); - ret = indirect_write(wdev, reg, addr, buf, len); + ret = wfx_indirect_write(wdev, reg, addr, buf, len); _trace_io_ind_write(reg, addr, buf, len); wdev->hwbus_ops->unlock(wdev->hwbus_priv); return ret; } -static int indirect_read32_locked(struct wfx_dev *wdev, int reg, - u32 addr, u32 *val) +static int wfx_indirect_read32_locked(struct wfx_dev *wdev, int reg, + u32 addr, u32 *val) { int ret; __le32 *tmp = kmalloc(sizeof(u32), GFP_KERNEL); @@ -195,7 +196,7 @@ static int indirect_read32_locked(struct wfx_dev *wdev, int reg, if (!tmp) return -ENOMEM; wdev->hwbus_ops->lock(wdev->hwbus_priv); - ret = indirect_read(wdev, reg, addr, tmp, sizeof(u32)); + ret = wfx_indirect_read(wdev, reg, addr, tmp, sizeof(u32)); *val = le32_to_cpu(*tmp); _trace_io_ind_read32(reg, addr, *val); wdev->hwbus_ops->unlock(wdev->hwbus_priv); @@ -203,8 +204,8 @@ static int indirect_read32_locked(struct wfx_dev *wdev, int reg, return ret; } -static int indirect_write32_locked(struct wfx_dev *wdev, int reg, - u32 addr, u32 val) +static int wfx_indirect_write32_locked(struct wfx_dev *wdev, int reg, + u32 addr, u32 val) { int ret; __le32 *tmp = kmalloc(sizeof(u32), GFP_KERNEL); @@ -213,7 +214,7 @@ static int indirect_write32_locked(struct wfx_dev *wdev, int reg, return -ENOMEM; *tmp = cpu_to_le32(val); wdev->hwbus_ops->lock(wdev->hwbus_priv); - ret = indirect_write(wdev, reg, addr, tmp, sizeof(u32)); + ret = wfx_indirect_write(wdev, reg, addr, tmp, sizeof(u32)); _trace_io_ind_write32(reg, addr, val); wdev->hwbus_ops->unlock(wdev->hwbus_priv); kfree(tmp); @@ -252,92 +253,100 @@ int wfx_data_write(struct wfx_dev *wdev, const void *buf, size_t len) return ret; } -int sram_buf_read(struct wfx_dev *wdev, u32 addr, void *buf, size_t len) +int wfx_sram_buf_read(struct wfx_dev *wdev, u32 addr, void *buf, size_t len) { - return indirect_read_locked(wdev, WFX_REG_SRAM_DPORT, addr, buf, len); + return wfx_indirect_read_locked(wdev, WFX_REG_SRAM_DPORT, + addr, buf, len); } -int ahb_buf_read(struct wfx_dev *wdev, u32 addr, void *buf, size_t len) +int wfx_ahb_buf_read(struct wfx_dev *wdev, u32 addr, void *buf, size_t len) { - return indirect_read_locked(wdev, WFX_REG_AHB_DPORT, addr, buf, len); + return wfx_indirect_read_locked(wdev, WFX_REG_AHB_DPORT, + addr, buf, len); } -int sram_buf_write(struct wfx_dev *wdev, u32 addr, const void *buf, size_t len) +int wfx_sram_buf_write(struct wfx_dev *wdev, u32 addr, + const void *buf, size_t len) { - return indirect_write_locked(wdev, WFX_REG_SRAM_DPORT, addr, buf, len); + return wfx_indirect_write_locked(wdev, WFX_REG_SRAM_DPORT, + addr, buf, len); } -int ahb_buf_write(struct wfx_dev *wdev, u32 addr, const void *buf, size_t len) +int wfx_ahb_buf_write(struct wfx_dev *wdev, u32 addr, + const void *buf, size_t len) { - return indirect_write_locked(wdev, WFX_REG_AHB_DPORT, addr, buf, len); + return wfx_indirect_write_locked(wdev, WFX_REG_AHB_DPORT, + addr, buf, len); } -int sram_reg_read(struct wfx_dev *wdev, u32 addr, u32 *val) +int wfx_sram_reg_read(struct wfx_dev *wdev, u32 addr, u32 *val) { - return indirect_read32_locked(wdev, WFX_REG_SRAM_DPORT, addr, val); + return wfx_indirect_read32_locked(wdev, WFX_REG_SRAM_DPORT, + addr, val); } -int ahb_reg_read(struct wfx_dev *wdev, u32 addr, u32 *val) +int wfx_ahb_reg_read(struct wfx_dev *wdev, u32 addr, u32 *val) { - return indirect_read32_locked(wdev, WFX_REG_AHB_DPORT, addr, val); + return wfx_indirect_read32_locked(wdev, WFX_REG_AHB_DPORT, + addr, val); } -int sram_reg_write(struct wfx_dev *wdev, u32 addr, u32 val) +int wfx_sram_reg_write(struct wfx_dev *wdev, u32 addr, u32 val) { - return indirect_write32_locked(wdev, WFX_REG_SRAM_DPORT, addr, val); + return wfx_indirect_write32_locked(wdev, WFX_REG_SRAM_DPORT, addr, val); } -int ahb_reg_write(struct wfx_dev *wdev, u32 addr, u32 val) +int wfx_ahb_reg_write(struct wfx_dev *wdev, u32 addr, u32 val) { - return indirect_write32_locked(wdev, WFX_REG_AHB_DPORT, addr, val); + return wfx_indirect_write32_locked(wdev, WFX_REG_AHB_DPORT, addr, val); } -int config_reg_read(struct wfx_dev *wdev, u32 *val) +int wfx_config_reg_read(struct wfx_dev *wdev, u32 *val) { - return read32_locked(wdev, WFX_REG_CONFIG, val); + return wfx_read32_locked(wdev, WFX_REG_CONFIG, val); } -int config_reg_write(struct wfx_dev *wdev, u32 val) +int wfx_config_reg_write(struct wfx_dev *wdev, u32 val) { - return write32_locked(wdev, WFX_REG_CONFIG, val); + return wfx_write32_locked(wdev, WFX_REG_CONFIG, val); } -int config_reg_write_bits(struct wfx_dev *wdev, u32 mask, u32 val) +int wfx_config_reg_write_bits(struct wfx_dev *wdev, u32 mask, u32 val) { - return write32_bits_locked(wdev, WFX_REG_CONFIG, mask, val); + return wfx_write32_bits_locked(wdev, WFX_REG_CONFIG, mask, val); } -int control_reg_read(struct wfx_dev *wdev, u32 *val) +int wfx_control_reg_read(struct wfx_dev *wdev, u32 *val) { - return read32_locked(wdev, WFX_REG_CONTROL, val); + return wfx_read32_locked(wdev, WFX_REG_CONTROL, val); } -int control_reg_write(struct wfx_dev *wdev, u32 val) +int wfx_control_reg_write(struct wfx_dev *wdev, u32 val) { - return write32_locked(wdev, WFX_REG_CONTROL, val); + return wfx_write32_locked(wdev, WFX_REG_CONTROL, val); } -int control_reg_write_bits(struct wfx_dev *wdev, u32 mask, u32 val) +int wfx_control_reg_write_bits(struct wfx_dev *wdev, u32 mask, u32 val) { - return write32_bits_locked(wdev, WFX_REG_CONTROL, mask, val); + return wfx_write32_bits_locked(wdev, WFX_REG_CONTROL, mask, val); } -int igpr_reg_read(struct wfx_dev *wdev, int index, u32 *val) +int wfx_igpr_reg_read(struct wfx_dev *wdev, int index, u32 *val) { int ret; *val = ~0; /* Never return undefined value */ - ret = write32_locked(wdev, WFX_REG_SET_GEN_R_W, IGPR_RW | index << 24); + ret = wfx_write32_locked(wdev, WFX_REG_SET_GEN_R_W, IGPR_RW | index << 24); if (ret) return ret; - ret = read32_locked(wdev, WFX_REG_SET_GEN_R_W, val); + ret = wfx_read32_locked(wdev, WFX_REG_SET_GEN_R_W, val); if (ret) return ret; *val &= IGPR_VALUE; return ret; } -int igpr_reg_write(struct wfx_dev *wdev, int index, u32 val) +int wfx_igpr_reg_write(struct wfx_dev *wdev, int index, u32 val) { - return write32_locked(wdev, WFX_REG_SET_GEN_R_W, index << 24 | val); + return wfx_write32_locked(wdev, WFX_REG_SET_GEN_R_W, index << 24 | val); } diff --git a/drivers/staging/wfx/hwio.h b/drivers/staging/wfx/hwio.h index d34baae47017..8c8fe76871f8 100644 --- a/drivers/staging/wfx/hwio.h +++ b/drivers/staging/wfx/hwio.h @@ -19,17 +19,17 @@ struct wfx_dev; int wfx_data_read(struct wfx_dev *wdev, void *buf, size_t buf_len); int wfx_data_write(struct wfx_dev *wdev, const void *buf, size_t buf_len); -int sram_buf_read(struct wfx_dev *wdev, u32 addr, void *buf, size_t len); -int sram_buf_write(struct wfx_dev *wdev, u32 addr, const void *buf, size_t len); +int wfx_sram_buf_read(struct wfx_dev *wdev, u32 addr, void *buf, size_t len); +int wfx_sram_buf_write(struct wfx_dev *wdev, u32 addr, const void *buf, size_t len); -int ahb_buf_read(struct wfx_dev *wdev, u32 addr, void *buf, size_t len); -int ahb_buf_write(struct wfx_dev *wdev, u32 addr, const void *buf, size_t len); +int wfx_ahb_buf_read(struct wfx_dev *wdev, u32 addr, void *buf, size_t len); +int wfx_ahb_buf_write(struct wfx_dev *wdev, u32 addr, const void *buf, size_t len); -int sram_reg_read(struct wfx_dev *wdev, u32 addr, u32 *val); -int sram_reg_write(struct wfx_dev *wdev, u32 addr, u32 val); +int wfx_sram_reg_read(struct wfx_dev *wdev, u32 addr, u32 *val); +int wfx_sram_reg_write(struct wfx_dev *wdev, u32 addr, u32 val); -int ahb_reg_read(struct wfx_dev *wdev, u32 addr, u32 *val); -int ahb_reg_write(struct wfx_dev *wdev, u32 addr, u32 val); +int wfx_ahb_reg_read(struct wfx_dev *wdev, u32 addr, u32 *val); +int wfx_ahb_reg_write(struct wfx_dev *wdev, u32 addr, u32 val); #define CFG_ERR_SPI_FRAME 0x00000001 /* only with SPI */ #define CFG_ERR_SDIO_BUF_MISMATCH 0x00000001 /* only with SDIO */ @@ -59,21 +59,21 @@ int ahb_reg_write(struct wfx_dev *wdev, u32 addr, u32 val); #define CFG_DEVICE_ID_MAJOR 0x07000000 #define CFG_DEVICE_ID_RESERVED 0x78000000 #define CFG_DEVICE_ID_TYPE 0x80000000 -int config_reg_read(struct wfx_dev *wdev, u32 *val); -int config_reg_write(struct wfx_dev *wdev, u32 val); -int config_reg_write_bits(struct wfx_dev *wdev, u32 mask, u32 val); +int wfx_config_reg_read(struct wfx_dev *wdev, u32 *val); +int wfx_config_reg_write(struct wfx_dev *wdev, u32 val); +int wfx_config_reg_write_bits(struct wfx_dev *wdev, u32 mask, u32 val); #define CTRL_NEXT_LEN_MASK 0x00000FFF #define CTRL_WLAN_WAKEUP 0x00001000 #define CTRL_WLAN_READY 0x00002000 -int control_reg_read(struct wfx_dev *wdev, u32 *val); -int control_reg_write(struct wfx_dev *wdev, u32 val); -int control_reg_write_bits(struct wfx_dev *wdev, u32 mask, u32 val); +int wfx_control_reg_read(struct wfx_dev *wdev, u32 *val); +int wfx_control_reg_write(struct wfx_dev *wdev, u32 val); +int wfx_control_reg_write_bits(struct wfx_dev *wdev, u32 mask, u32 val); #define IGPR_RW 0x80000000 #define IGPR_INDEX 0x7F000000 #define IGPR_VALUE 0x00FFFFFF -int igpr_reg_read(struct wfx_dev *wdev, int index, u32 *val); -int igpr_reg_write(struct wfx_dev *wdev, int index, u32 val); +int wfx_igpr_reg_read(struct wfx_dev *wdev, int index, u32 *val); +int wfx_igpr_reg_write(struct wfx_dev *wdev, int index, u32 val); #endif diff --git a/drivers/staging/wfx/main.c b/drivers/staging/wfx/main.c index abc1a6d43300..43947f8f2e0c 100644 --- a/drivers/staging/wfx/main.c +++ b/drivers/staging/wfx/main.c @@ -428,7 +428,7 @@ int wfx_probe(struct wfx_dev *wdev) "enable 'quiescent' power mode with wakeup GPIO and PDS file %s\n", wdev->pdata.file_pds); gpiod_set_value_cansleep(wdev->pdata.gpio_wakeup, 1); - control_reg_write(wdev, 0); + wfx_control_reg_write(wdev, 0); wfx_hif_set_operational_mode(wdev, HIF_OP_POWER_MODE_QUIESCENT); } else { wfx_hif_set_operational_mode(wdev, HIF_OP_POWER_MODE_DOZE);