Message ID | 20220126103037.234986-5-idosch@nvidia.com (mailing list archive) |
---|---|
State | Accepted |
Commit | 78cf4b92218bf777b2f04c1d44fe458686cc7504 |
Delegated to: | Netdev Maintainers |
Headers | show |
Series | mlxsw: Add RJ45 ports support | expand |
Context | Check | Description |
---|---|---|
netdev/tree_selection | success | Clearly marked for net-next |
netdev/apply | success | Patch already applied to net-next |
On Wed, Jan 26, 2022 at 12:30:32PM +0200, Ido Schimmel wrote: > From: Danielle Ratson <danieller@nvidia.com> > > As part of a process for supporting a new system with RJ45 connectors, > 100BaseT and 1000BaseT link modes need to be supported. I'm surprised you don't have 2500BaseT, 5000baseT and 10000BaseT? Andrew
On Wed, Jan 26, 2022 at 02:43:55PM +0100, Andrew Lunn wrote: > On Wed, Jan 26, 2022 at 12:30:32PM +0200, Ido Schimmel wrote: > > From: Danielle Ratson <danieller@nvidia.com> > > > > As part of a process for supporting a new system with RJ45 connectors, > > 100BaseT and 1000BaseT link modes need to be supported. > > I'm surprised you don't have 2500BaseT, 5000baseT and 10000BaseT? I believe there weren't any requirements for these link modes on the new system, so it wasn't designed to support them. I see it is still not listed on the web site. Will send you a link once it's there.
diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h index 24cc65018b41..c7eb48f350e3 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/reg.h +++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h @@ -4482,6 +4482,8 @@ MLXSW_ITEM32(reg, ptys, ext_eth_proto_cap, 0x08, 0, 32); #define MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 BIT(21) #define MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 BIT(22) #define MLXSW_REG_PTYS_ETH_SPEED_100GBASE_LR4_ER4 BIT(23) +#define MLXSW_REG_PTYS_ETH_SPEED_100BASE_T BIT(24) +#define MLXSW_REG_PTYS_ETH_SPEED_1000BASE_T BIT(25) #define MLXSW_REG_PTYS_ETH_SPEED_25GBASE_CR BIT(27) #define MLXSW_REG_PTYS_ETH_SPEED_25GBASE_KR BIT(28) #define MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR BIT(29) diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum_ethtool.c b/drivers/net/ethernet/mellanox/mlxsw/spectrum_ethtool.c index 055f857931b2..8b5d7f83b9b0 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/spectrum_ethtool.c +++ b/drivers/net/ethernet/mellanox/mlxsw/spectrum_ethtool.c @@ -1266,12 +1266,22 @@ struct mlxsw_sp1_port_link_mode { }; static const struct mlxsw_sp1_port_link_mode mlxsw_sp1_port_link_mode[] = { + { + .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_T, + .mask_ethtool = ETHTOOL_LINK_MODE_100baseT_Full_BIT, + .speed = SPEED_100, + }, { .mask = MLXSW_REG_PTYS_ETH_SPEED_SGMII | MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX, .mask_ethtool = ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, .speed = SPEED_1000, }, + { + .mask = MLXSW_REG_PTYS_ETH_SPEED_1000BASE_T, + .mask_ethtool = ETHTOOL_LINK_MODE_1000baseT_Full_BIT, + .speed = SPEED_1000, + }, { .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CX4 | MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4,