@@ -292,12 +292,10 @@ static int realtek_smi_write_reg(struct realtek_priv *priv,
* is when issueing soft reset. Since the device reset as soon as we write
* that bit, no ACK will come back for natural reasons.
*/
-int realtek_smi_write_reg_noack(struct realtek_priv *priv, u32 addr,
- u32 data)
+static int realtek_smi_write_reg_noack(void *ctx, u32 reg, u32 val)
{
- return realtek_smi_write_reg(priv, addr, data, false);
+ return realtek_smi_write_reg(ctx, reg, val, false);
}
-EXPORT_SYMBOL_GPL(realtek_smi_write_reg_noack);
/* Regmap accessors */
@@ -342,8 +340,9 @@ static int realtek_smi_mdio_write(struct mii_bus *bus, int addr, int regnum,
return priv->ops->phy_write(priv, addr, regnum, val);
}
-int realtek_smi_setup_mdio(struct realtek_priv *priv)
+static int realtek_smi_setup_mdio(struct dsa_switch *ds)
{
+ struct realtek_priv *priv = ds->priv;
struct device_node *mdio_np;
int ret;
@@ -363,10 +362,10 @@ int realtek_smi_setup_mdio(struct realtek_priv *priv)
priv->slave_mii_bus->read = realtek_smi_mdio_read;
priv->slave_mii_bus->write = realtek_smi_mdio_write;
snprintf(priv->slave_mii_bus->id, MII_BUS_ID_SIZE, "SMI-%d",
- priv->ds->index);
+ ds->index);
priv->slave_mii_bus->dev.of_node = mdio_np;
priv->slave_mii_bus->parent = priv->dev;
- priv->ds->slave_mii_bus = priv->slave_mii_bus;
+ ds->slave_mii_bus = priv->slave_mii_bus;
ret = devm_of_mdiobus_register(priv->dev, priv->slave_mii_bus, mdio_np);
if (ret) {
@@ -413,6 +412,9 @@ static int realtek_smi_probe(struct platform_device *pdev)
priv->cmd_write = var->cmd_write;
priv->ops = var->ops;
+ priv->setup_interface = realtek_smi_setup_mdio;
+ priv->write_reg_noack = realtek_smi_write_reg_noack;
+
dev_set_drvdata(dev, priv);
spin_lock_init(&priv->lock);
@@ -66,6 +66,8 @@ struct realtek_priv {
struct rtl8366_mib_counter *mib_counters;
const struct realtek_ops *ops;
+ int (*setup_interface)(struct dsa_switch *ds);
+ int (*write_reg_noack)(void *ctx, u32 addr, u32 data);
int vlan_enabled;
int vlan4k_enabled;
@@ -115,11 +117,6 @@ struct realtek_variant {
size_t chip_data_sz;
};
-/* SMI core calls */
-int realtek_smi_write_reg_noack(struct realtek_priv *priv, u32 addr,
- u32 data);
-int realtek_smi_setup_mdio(struct realtek_priv *priv);
-
/* RTL8366 library helpers */
int rtl8366_mc_is_used(struct realtek_priv *priv, int mc_index, int *used);
int rtl8366_set_vlan(struct realtek_priv *priv, int vid, u32 member,
@@ -1767,9 +1767,8 @@ static int rtl8365mb_reset_chip(struct realtek_priv *priv)
{
u32 val;
- realtek_smi_write_reg_noack(priv, RTL8365MB_CHIP_RESET_REG,
- FIELD_PREP(RTL8365MB_CHIP_RESET_HW_MASK,
- 1));
+ priv->write_reg_noack(priv, RTL8365MB_CHIP_RESET_REG,
+ FIELD_PREP(RTL8365MB_CHIP_RESET_HW_MASK, 1));
/* Realtek documentation says the chip needs 1 second to reset. Sleep
* for 100 ms before accessing any registers to prevent ACK timeouts.
@@ -1849,10 +1848,12 @@ static int rtl8365mb_setup(struct dsa_switch *ds)
if (ret)
goto out_teardown_irq;
- ret = realtek_smi_setup_mdio(priv);
- if (ret) {
- dev_err(priv->dev, "could not set up MDIO bus\n");
- goto out_teardown_irq;
+ if (priv->setup_interface) {
+ ret = priv->setup_interface(ds);
+ if (ret) {
+ dev_err(priv->dev, "could not set up MDIO bus\n");
+ goto out_teardown_irq;
+ }
}
/* Start statistics counter polling */
@@ -1030,10 +1030,12 @@ static int rtl8366rb_setup(struct dsa_switch *ds)
if (ret)
dev_info(priv->dev, "no interrupt support\n");
- ret = realtek_smi_setup_mdio(priv);
- if (ret) {
- dev_info(priv->dev, "could not set up MDIO bus\n");
- return -ENODEV;
+ if (priv->setup_interface) {
+ ret = priv->setup_interface(ds);
+ if (ret) {
+ dev_err(priv->dev, "could not set up MDIO bus\n");
+ return -ENODEV;
+ }
}
return 0;
@@ -1707,8 +1709,8 @@ static int rtl8366rb_reset_chip(struct realtek_priv *priv)
u32 val;
int ret;
- realtek_smi_write_reg_noack(priv, RTL8366RB_RESET_CTRL_REG,
- RTL8366RB_CHIP_CTRL_RESET_HW);
+ priv->write_reg_noack(priv, RTL8366RB_RESET_CTRL_REG,
+ RTL8366RB_CHIP_CTRL_RESET_HW);
do {
usleep_range(20000, 25000);
ret = regmap_read(priv->map, RTL8366RB_RESET_CTRL_REG, &val);