| Message ID | 20220209174850.32360-1-amit.kumar-mahapatra@xilinx.com (mailing list archive) |
|---|---|
| State | Awaiting Upstream |
| Delegated to: | Netdev Maintainers |
| Headers | show |
| Series | [v2] dt-bindings: can: xilinx_can: Convert Xilinx CAN binding to YAML | expand |
| Context | Check | Description |
|---|---|---|
| netdev/tree_selection | success | Not a local patch |
On Wed, 09 Feb 2022 23:18:50 +0530, Amit Kumar Mahapatra wrote: > Convert Xilinx CAN binding documentation to YAML. > > Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com> > --- > BRANCH: yaml > > Changes in v2: > - Added reference to can-controller.yaml > - Added example node for canfd-2.0 > --- > .../bindings/net/can/xilinx_can.txt | 61 ------- > .../bindings/net/can/xilinx_can.yaml | 160 ++++++++++++++++++ > 2 files changed, 160 insertions(+), 61 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/net/can/xilinx_can.txt > create mode 100644 Documentation/devicetree/bindings/net/can/xilinx_can.yaml > Running 'make dtbs_check' with the schema in this patch gives the following warnings. Consider if they are expected or the schema is incorrect. These may not be new warnings. Note that it is not yet a requirement to have 0 warnings for dtbs_check. This will change in the future. Full log is available here: https://patchwork.ozlabs.org/patch/1590637 can@ff060000: 'power-domains' does not match any of the regexes: 'pinctrl-[0-9]+' arch/arm64/boot/dts/xilinx/avnet-ultra96-rev1.dt.yaml arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dt.yaml arch/arm64/boot/dts/xilinx/zynqmp-smk-k26-revA.dt.yaml arch/arm64/boot/dts/xilinx/zynqmp-zc1232-revA.dt.yaml arch/arm64/boot/dts/xilinx/zynqmp-zc1254-revA.dt.yaml arch/arm64/boot/dts/xilinx/zynqmp-zc1275-revA.dt.yaml arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dt.yaml arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dt.yaml arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dt.yaml arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dt.yaml arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm019-dc5.dt.yaml arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dt.yaml arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.0.dt.yaml arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.1.dt.yaml arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dt.yaml arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revB.dt.yaml arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dt.yaml arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dt.yaml arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dt.yaml arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dt.yaml can@ff070000: 'power-domains' does not match any of the regexes: 'pinctrl-[0-9]+' arch/arm64/boot/dts/xilinx/avnet-ultra96-rev1.dt.yaml arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dt.yaml arch/arm64/boot/dts/xilinx/zynqmp-smk-k26-revA.dt.yaml arch/arm64/boot/dts/xilinx/zynqmp-zc1232-revA.dt.yaml arch/arm64/boot/dts/xilinx/zynqmp-zc1254-revA.dt.yaml arch/arm64/boot/dts/xilinx/zynqmp-zc1275-revA.dt.yaml arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dt.yaml arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dt.yaml arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dt.yaml arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dt.yaml arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm019-dc5.dt.yaml arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dt.yaml arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.0.dt.yaml arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.1.dt.yaml arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dt.yaml arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revB.dt.yaml arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dt.yaml arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dt.yaml arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dt.yaml arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dt.yaml
On 2/9/22 23:26, Rob Herring wrote: > On Wed, 09 Feb 2022 23:18:50 +0530, Amit Kumar Mahapatra wrote: >> Convert Xilinx CAN binding documentation to YAML. >> >> Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com> >> --- >> BRANCH: yaml >> >> Changes in v2: >> - Added reference to can-controller.yaml >> - Added example node for canfd-2.0 >> --- >> .../bindings/net/can/xilinx_can.txt | 61 ------- >> .../bindings/net/can/xilinx_can.yaml | 160 ++++++++++++++++++ >> 2 files changed, 160 insertions(+), 61 deletions(-) >> delete mode 100644 Documentation/devicetree/bindings/net/can/xilinx_can.txt >> create mode 100644 Documentation/devicetree/bindings/net/can/xilinx_can.yaml >> > > Running 'make dtbs_check' with the schema in this patch gives the > following warnings. Consider if they are expected or the schema is > incorrect. These may not be new warnings. > > Note that it is not yet a requirement to have 0 warnings for dtbs_check. > This will change in the future. > > Full log is available here: https://patchwork.ozlabs.org/patch/1590637 > > > can@ff060000: 'power-domains' does not match any of the regexes: 'pinctrl-[0-9]+' > arch/arm64/boot/dts/xilinx/avnet-ultra96-rev1.dt.yaml > arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dt.yaml > arch/arm64/boot/dts/xilinx/zynqmp-smk-k26-revA.dt.yaml > arch/arm64/boot/dts/xilinx/zynqmp-zc1232-revA.dt.yaml > arch/arm64/boot/dts/xilinx/zynqmp-zc1254-revA.dt.yaml > arch/arm64/boot/dts/xilinx/zynqmp-zc1275-revA.dt.yaml > arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dt.yaml > arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dt.yaml > arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dt.yaml > arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dt.yaml > arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm019-dc5.dt.yaml > arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dt.yaml > arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.0.dt.yaml > arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.1.dt.yaml > arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dt.yaml > arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revB.dt.yaml > arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dt.yaml > arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dt.yaml > arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dt.yaml > arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dt.yaml > > can@ff070000: 'power-domains' does not match any of the regexes: 'pinctrl-[0-9]+' > arch/arm64/boot/dts/xilinx/avnet-ultra96-rev1.dt.yaml > arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dt.yaml > arch/arm64/boot/dts/xilinx/zynqmp-smk-k26-revA.dt.yaml > arch/arm64/boot/dts/xilinx/zynqmp-zc1232-revA.dt.yaml > arch/arm64/boot/dts/xilinx/zynqmp-zc1254-revA.dt.yaml > arch/arm64/boot/dts/xilinx/zynqmp-zc1275-revA.dt.yaml > arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dt.yaml > arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dt.yaml > arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dt.yaml > arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dt.yaml > arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm019-dc5.dt.yaml > arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dt.yaml > arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.0.dt.yaml > arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.1.dt.yaml > arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dt.yaml > arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revB.dt.yaml > arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dt.yaml > arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dt.yaml > arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dt.yaml > arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dt.yaml > Yes add power-domains as was done for example by this commit for ttc. Thanks, Michal commit 557804a81d256b15952dcd179280ede92a5bfae1 Author: Michal Simek <michal.simek@xilinx.com> AuthorDate: Fri Oct 15 10:29:14 2021 +0200 Commit: Daniel Lezcano <daniel.lezcano@linaro.org> CommitDate: Tue Nov 2 10:03:25 2021 +0100 dt-bindings: timer: cadence_ttc: Add power-domains Describe optional power-domain property to fix dts_check warnings. The similar change was done by commit 8c0aa567146b ("dt-bindings: gpio: fsl-imx-gpio: Add power-domains"). Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/cc655a72b20790f6d7408b1aaf81c4bf878aafb4.1634286552.git.michal.simek@xilinx.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
On Wed, Feb 09, 2022 at 11:18:50PM +0530, Amit Kumar Mahapatra wrote: > Convert Xilinx CAN binding documentation to YAML. > > Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com> > --- > BRANCH: yaml > > Changes in v2: > - Added reference to can-controller.yaml > - Added example node for canfd-2.0 > --- > .../bindings/net/can/xilinx_can.txt | 61 ------- > .../bindings/net/can/xilinx_can.yaml | 160 ++++++++++++++++++ > 2 files changed, 160 insertions(+), 61 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/net/can/xilinx_can.txt > create mode 100644 Documentation/devicetree/bindings/net/can/xilinx_can.yaml > > diff --git a/Documentation/devicetree/bindings/net/can/xilinx_can.txt b/Documentation/devicetree/bindings/net/can/xilinx_can.txt > deleted file mode 100644 > index 100cc40b8510..000000000000 > --- a/Documentation/devicetree/bindings/net/can/xilinx_can.txt > +++ /dev/null > @@ -1,61 +0,0 @@ > -Xilinx Axi CAN/Zynq CANPS controller Device Tree Bindings > ---------------------------------------------------------- > - > -Required properties: > -- compatible : Should be: > - - "xlnx,zynq-can-1.0" for Zynq CAN controllers > - - "xlnx,axi-can-1.00.a" for Axi CAN controllers > - - "xlnx,canfd-1.0" for CAN FD controllers > - - "xlnx,canfd-2.0" for CAN FD 2.0 controllers > -- reg : Physical base address and size of the controller > - registers map. > -- interrupts : Property with a value describing the interrupt > - number. > -- clock-names : List of input clock names > - - "can_clk", "pclk" (For CANPS), > - - "can_clk", "s_axi_aclk" (For AXI CAN and CAN FD). > - (See clock bindings for details). > -- clocks : Clock phandles (see clock bindings for details). > -- tx-fifo-depth : Can Tx fifo depth (Zynq, Axi CAN). > -- rx-fifo-depth : Can Rx fifo depth (Zynq, Axi CAN, CAN FD in > - sequential Rx mode). > -- tx-mailbox-count : Can Tx mailbox buffer count (CAN FD). > -- rx-mailbox-count : Can Rx mailbox buffer count (CAN FD in mailbox Rx > - mode). > - > - > -Example: > - > -For Zynq CANPS Dts file: > - zynq_can_0: can@e0008000 { > - compatible = "xlnx,zynq-can-1.0"; > - clocks = <&clkc 19>, <&clkc 36>; > - clock-names = "can_clk", "pclk"; > - reg = <0xe0008000 0x1000>; > - interrupts = <0 28 4>; > - interrupt-parent = <&intc>; > - tx-fifo-depth = <0x40>; > - rx-fifo-depth = <0x40>; > - }; > -For Axi CAN Dts file: > - axi_can_0: axi-can@40000000 { > - compatible = "xlnx,axi-can-1.00.a"; > - clocks = <&clkc 0>, <&clkc 1>; > - clock-names = "can_clk","s_axi_aclk" ; > - reg = <0x40000000 0x10000>; > - interrupt-parent = <&intc>; > - interrupts = <0 59 1>; > - tx-fifo-depth = <0x40>; > - rx-fifo-depth = <0x40>; > - }; > -For CAN FD Dts file: > - canfd_0: canfd@40000000 { > - compatible = "xlnx,canfd-1.0"; > - clocks = <&clkc 0>, <&clkc 1>; > - clock-names = "can_clk", "s_axi_aclk"; > - reg = <0x40000000 0x2000>; > - interrupt-parent = <&intc>; > - interrupts = <0 59 1>; > - tx-mailbox-count = <0x20>; > - rx-fifo-depth = <0x20>; > - }; > diff --git a/Documentation/devicetree/bindings/net/can/xilinx_can.yaml b/Documentation/devicetree/bindings/net/can/xilinx_can.yaml > new file mode 100644 > index 000000000000..50ff9b40fe87 > --- /dev/null > +++ b/Documentation/devicetree/bindings/net/can/xilinx_can.yaml > @@ -0,0 +1,160 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/net/can/xilinx_can.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: > + Xilinx Axi CAN/Zynq CANPS controller Binding > + > +maintainers: > + - Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com> > + > +properties: > + compatible: > + oneOf: > + - const: xlnx,zynq-can-1.0 > + description: For Zynq CAN controller > + - const: xlnx,axi-can-1.00.a > + description: For Axi CAN controller > + - const: xlnx,canfd-1.0 > + description: For CAN FD controller > + - const: xlnx,canfd-2.0 > + description: For CAN FD 2.0 controller > + > + reg: > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > + clocks: > + description: | > + CAN functional clock phandle Drop. > + maxItems: 2 > + > + tx-fifo-depth: > + description: | > + CAN Tx fifo depth (Zynq, Axi CAN). > + > + rx-fifo-depth: > + description: | > + CAN Rx fifo depth (Zynq, Axi CAN, CAN FD in sequential Rx mode) > + > + tx-mailbox-count: > + description: | > + CAN Tx mailbox buffer count (CAN FD) > + > + rx-mailbox-count: > + description: | > + CAN Rx mailbox buffer count (CAN FD in mailbox Rx mode) All these need a type $ref. > + > + clock-names: > + maxItems: 2 Group with 'clocks'. > + > +required: > + - compatible > + - reg > + - interrupts > + - clocks > + - clock-names > + > +additionalProperties: false > + > +allOf: > + - $ref: can-controller.yaml# > + - if: > + properties: > + compatible: > + contains: > + const: xlnx,zynq-can-1.0 > + > + then: > + properties: > + clock-names: > + items: > + - const: can_clk > + - const: pclk > + required: > + - tx-fifo-depth > + - rx-fifo-depth > + > + - if: > + properties: > + compatible: > + contains: > + const: xlnx,axi-can-1.00.a > + > + then: > + properties: > + clock-names: > + items: > + - const: can_clk > + - const: s_axi_aclk > + required: > + - tx-fifo-depth > + - rx-fifo-depth > + > + - if: > + properties: > + compatible: > + contains: > + anyOf: > + - const: xlnx,canfd-1.0 > + - const: xlnx,canfd-2.0 > + > + then: > + properties: > + clock-names: > + items: > + - const: can_clk > + - const: s_axi_aclk > + required: > + - tx-mailbox-count > + - rx-fifo-depth > + > +examples: > + - | > + zynq_can_0: can@e0008000 { Drop unused labels. > + compatible = "xlnx,zynq-can-1.0"; > + clocks = <&clkc 19>, <&clkc 36>; > + clock-names = "can_clk", "pclk"; > + reg = <0xe0008000 0x1000>; > + interrupts = <0 28 4>; > + interrupt-parent = <&intc>; > + tx-fifo-depth = <0x40>; > + rx-fifo-depth = <0x40>; > + }; > + - | > + axi_can_0: can@40000000 { > + compatible = "xlnx,axi-can-1.00.a"; > + clocks = <&clkc 0>, <&clkc 1>; > + clock-names = "can_clk","s_axi_aclk" ; > + reg = <0x40000000 0x10000>; > + interrupt-parent = <&intc>; > + interrupts = <0 59 1>; > + tx-fifo-depth = <0x40>; > + rx-fifo-depth = <0x40>; > + }; > + - | > + canfd_0: can@40000000 { > + compatible = "xlnx,canfd-1.0"; > + clocks = <&clkc 0>, <&clkc 1>; > + clock-names = "can_clk", "s_axi_aclk"; > + reg = <0x40000000 0x2000>; > + interrupt-parent = <&intc>; > + interrupts = <0 59 1>; > + tx-mailbox-count = <0x20>; > + rx-fifo-depth = <0x20>; > + }; > + - | > + canfd_1: can@ff060000 { > + compatible = "xlnx,canfd-2.0"; > + clocks = <&clkc 0>, <&clkc 1>; > + clock-names = "can_clk", "s_axi_aclk"; > + reg = <0xff060000 0x6000>; > + interrupt-parent = <&intc>; > + interrupts = <0 59 1>; > + tx-mailbox-count = <0x20>; > + rx-fifo-depth = <0x40>; > + }; > -- > 2.17.1 > >
diff --git a/Documentation/devicetree/bindings/net/can/xilinx_can.txt b/Documentation/devicetree/bindings/net/can/xilinx_can.txt deleted file mode 100644 index 100cc40b8510..000000000000 --- a/Documentation/devicetree/bindings/net/can/xilinx_can.txt +++ /dev/null @@ -1,61 +0,0 @@ -Xilinx Axi CAN/Zynq CANPS controller Device Tree Bindings ---------------------------------------------------------- - -Required properties: -- compatible : Should be: - - "xlnx,zynq-can-1.0" for Zynq CAN controllers - - "xlnx,axi-can-1.00.a" for Axi CAN controllers - - "xlnx,canfd-1.0" for CAN FD controllers - - "xlnx,canfd-2.0" for CAN FD 2.0 controllers -- reg : Physical base address and size of the controller - registers map. -- interrupts : Property with a value describing the interrupt - number. -- clock-names : List of input clock names - - "can_clk", "pclk" (For CANPS), - - "can_clk", "s_axi_aclk" (For AXI CAN and CAN FD). - (See clock bindings for details). -- clocks : Clock phandles (see clock bindings for details). -- tx-fifo-depth : Can Tx fifo depth (Zynq, Axi CAN). -- rx-fifo-depth : Can Rx fifo depth (Zynq, Axi CAN, CAN FD in - sequential Rx mode). -- tx-mailbox-count : Can Tx mailbox buffer count (CAN FD). -- rx-mailbox-count : Can Rx mailbox buffer count (CAN FD in mailbox Rx - mode). - - -Example: - -For Zynq CANPS Dts file: - zynq_can_0: can@e0008000 { - compatible = "xlnx,zynq-can-1.0"; - clocks = <&clkc 19>, <&clkc 36>; - clock-names = "can_clk", "pclk"; - reg = <0xe0008000 0x1000>; - interrupts = <0 28 4>; - interrupt-parent = <&intc>; - tx-fifo-depth = <0x40>; - rx-fifo-depth = <0x40>; - }; -For Axi CAN Dts file: - axi_can_0: axi-can@40000000 { - compatible = "xlnx,axi-can-1.00.a"; - clocks = <&clkc 0>, <&clkc 1>; - clock-names = "can_clk","s_axi_aclk" ; - reg = <0x40000000 0x10000>; - interrupt-parent = <&intc>; - interrupts = <0 59 1>; - tx-fifo-depth = <0x40>; - rx-fifo-depth = <0x40>; - }; -For CAN FD Dts file: - canfd_0: canfd@40000000 { - compatible = "xlnx,canfd-1.0"; - clocks = <&clkc 0>, <&clkc 1>; - clock-names = "can_clk", "s_axi_aclk"; - reg = <0x40000000 0x2000>; - interrupt-parent = <&intc>; - interrupts = <0 59 1>; - tx-mailbox-count = <0x20>; - rx-fifo-depth = <0x20>; - }; diff --git a/Documentation/devicetree/bindings/net/can/xilinx_can.yaml b/Documentation/devicetree/bindings/net/can/xilinx_can.yaml new file mode 100644 index 000000000000..50ff9b40fe87 --- /dev/null +++ b/Documentation/devicetree/bindings/net/can/xilinx_can.yaml @@ -0,0 +1,160 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/can/xilinx_can.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: + Xilinx Axi CAN/Zynq CANPS controller Binding + +maintainers: + - Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com> + +properties: + compatible: + oneOf: + - const: xlnx,zynq-can-1.0 + description: For Zynq CAN controller + - const: xlnx,axi-can-1.00.a + description: For Axi CAN controller + - const: xlnx,canfd-1.0 + description: For CAN FD controller + - const: xlnx,canfd-2.0 + description: For CAN FD 2.0 controller + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + description: | + CAN functional clock phandle + maxItems: 2 + + tx-fifo-depth: + description: | + CAN Tx fifo depth (Zynq, Axi CAN). + + rx-fifo-depth: + description: | + CAN Rx fifo depth (Zynq, Axi CAN, CAN FD in sequential Rx mode) + + tx-mailbox-count: + description: | + CAN Tx mailbox buffer count (CAN FD) + + rx-mailbox-count: + description: | + CAN Rx mailbox buffer count (CAN FD in mailbox Rx mode) + + clock-names: + maxItems: 2 + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + +additionalProperties: false + +allOf: + - $ref: can-controller.yaml# + - if: + properties: + compatible: + contains: + const: xlnx,zynq-can-1.0 + + then: + properties: + clock-names: + items: + - const: can_clk + - const: pclk + required: + - tx-fifo-depth + - rx-fifo-depth + + - if: + properties: + compatible: + contains: + const: xlnx,axi-can-1.00.a + + then: + properties: + clock-names: + items: + - const: can_clk + - const: s_axi_aclk + required: + - tx-fifo-depth + - rx-fifo-depth + + - if: + properties: + compatible: + contains: + anyOf: + - const: xlnx,canfd-1.0 + - const: xlnx,canfd-2.0 + + then: + properties: + clock-names: + items: + - const: can_clk + - const: s_axi_aclk + required: + - tx-mailbox-count + - rx-fifo-depth + +examples: + - | + zynq_can_0: can@e0008000 { + compatible = "xlnx,zynq-can-1.0"; + clocks = <&clkc 19>, <&clkc 36>; + clock-names = "can_clk", "pclk"; + reg = <0xe0008000 0x1000>; + interrupts = <0 28 4>; + interrupt-parent = <&intc>; + tx-fifo-depth = <0x40>; + rx-fifo-depth = <0x40>; + }; + - | + axi_can_0: can@40000000 { + compatible = "xlnx,axi-can-1.00.a"; + clocks = <&clkc 0>, <&clkc 1>; + clock-names = "can_clk","s_axi_aclk" ; + reg = <0x40000000 0x10000>; + interrupt-parent = <&intc>; + interrupts = <0 59 1>; + tx-fifo-depth = <0x40>; + rx-fifo-depth = <0x40>; + }; + - | + canfd_0: can@40000000 { + compatible = "xlnx,canfd-1.0"; + clocks = <&clkc 0>, <&clkc 1>; + clock-names = "can_clk", "s_axi_aclk"; + reg = <0x40000000 0x2000>; + interrupt-parent = <&intc>; + interrupts = <0 59 1>; + tx-mailbox-count = <0x20>; + rx-fifo-depth = <0x20>; + }; + - | + canfd_1: can@ff060000 { + compatible = "xlnx,canfd-2.0"; + clocks = <&clkc 0>, <&clkc 1>; + clock-names = "can_clk", "s_axi_aclk"; + reg = <0xff060000 0x6000>; + interrupt-parent = <&intc>; + interrupts = <0 59 1>; + tx-mailbox-count = <0x20>; + rx-fifo-depth = <0x40>; + };
Convert Xilinx CAN binding documentation to YAML. Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com> --- BRANCH: yaml Changes in v2: - Added reference to can-controller.yaml - Added example node for canfd-2.0 --- .../bindings/net/can/xilinx_can.txt | 61 ------- .../bindings/net/can/xilinx_can.yaml | 160 ++++++++++++++++++ 2 files changed, 160 insertions(+), 61 deletions(-) delete mode 100644 Documentation/devicetree/bindings/net/can/xilinx_can.txt create mode 100644 Documentation/devicetree/bindings/net/can/xilinx_can.yaml