@@ -137,3 +137,8 @@ own name.
* - ``event_eq_size``
- u32
- Control the size of asynchronous control events EQ.
+ * - ``cpu_affinity``
+ - Bitfield
+ - control the cpu affinity of the device. user is able to change cpu
+ affinity also via procfs interface (/proc/irq/\*/smp_affinity). This will
+ overwrite the devlink setting.
@@ -466,6 +466,7 @@ enum devlink_param_generic_id {
DEVLINK_PARAM_GENERIC_ID_ENABLE_IWARP,
DEVLINK_PARAM_GENERIC_ID_IO_EQ_SIZE,
DEVLINK_PARAM_GENERIC_ID_EVENT_EQ_SIZE,
+ DEVLINK_PARAM_GENERIC_ID_CPU_AFFINITY,
/* add new param generic ids above here*/
__DEVLINK_PARAM_GENERIC_ID_MAX,
@@ -524,6 +525,9 @@ enum devlink_param_generic_id {
#define DEVLINK_PARAM_GENERIC_EVENT_EQ_SIZE_NAME "event_eq_size"
#define DEVLINK_PARAM_GENERIC_EVENT_EQ_SIZE_TYPE DEVLINK_PARAM_TYPE_U32
+#define DEVLINK_PARAM_GENERIC_CPU_AFFINITY_NAME "cpu_affinity"
+#define DEVLINK_PARAM_GENERIC_CPU_AFFINITY_TYPE DEVLINK_PARAM_TYPE_BITFIELD
+
#define DEVLINK_PARAM_GENERIC(_id, _cmodes, _get, _set, _validate) \
{ \
.id = DEVLINK_PARAM_GENERIC_ID_##_id, \
@@ -4477,6 +4477,11 @@ static const struct devlink_param devlink_param_generic[] = {
.name = DEVLINK_PARAM_GENERIC_EVENT_EQ_SIZE_NAME,
.type = DEVLINK_PARAM_GENERIC_EVENT_EQ_SIZE_TYPE,
},
+ {
+ .id = DEVLINK_PARAM_GENERIC_ID_CPU_AFFINITY,
+ .name = DEVLINK_PARAM_GENERIC_CPU_AFFINITY_NAME,
+ .type = DEVLINK_PARAM_GENERIC_CPU_AFFINITY_TYPE,
+ },
};
static int devlink_param_generic_verify(const struct devlink_param *param)
Add new device generic parameter to configure device affinity. A user who wishes to customize the affinity of the device can do it using below example. $ devlink dev param set auxiliary/mlx5_core.sf.4 name cpu_affinity \ value [cpu_bitmask] cmode driverinit $ devlink dev reload pci/0000:06:00.0 At this point devlink instance will use the customize affinity. Signed-off-by: Shay Drory <shayd@nvidia.com> --- Documentation/networking/devlink/devlink-params.rst | 5 +++++ include/net/devlink.h | 4 ++++ net/core/devlink.c | 5 +++++ 3 files changed, 14 insertions(+)