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[82.81.222.124]) by smtp.gmail.com with ESMTPSA id bj3-20020a0560001e0300b0020af3d365f4sm1876249wrb.98.2022.04.28.01.29.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Apr 2022 01:29:12 -0700 (PDT) From: Josua Mayer To: netdev@vger.kernel.org Cc: alvaro.karsz@solid-run.com, Josua Mayer , Andrew Lunn , Michael Hennerich , "David S. Miller" , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Alexandru Ardelean Subject: [PATCH v3 1/3] dt-bindings: net: adin: document phy clock output properties Date: Thu, 28 Apr 2022 11:28:46 +0300 Message-Id: <20220428082848.12191-2-josua@solid-run.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220428082848.12191-1-josua@solid-run.com> References: <20220419102709.26432-1-josua@solid-run.com> <20220428082848.12191-1-josua@solid-run.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org The ADIN1300 supports generating certain clocks on its GP_CLK pin, as well as providing the reference clock on CLK25_REF. Add DT properties to configure both pins. Signed-off-by: Josua Mayer Reviewed-by: Andrew Lunn --- V1 -> V2: changed clkout property to enum V1 -> V2: added property for CLK25_REF pin .../devicetree/bindings/net/adi,adin.yaml | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/Documentation/devicetree/bindings/net/adi,adin.yaml b/Documentation/devicetree/bindings/net/adi,adin.yaml index 1129f2b58e98..3e0c6304f190 100644 --- a/Documentation/devicetree/bindings/net/adi,adin.yaml +++ b/Documentation/devicetree/bindings/net/adi,adin.yaml @@ -36,6 +36,23 @@ properties: enum: [ 4, 8, 12, 16, 20, 24 ] default: 8 + adi,phy-output-clock: + description: Select clock output on GP_CLK pin. Three clocks are available: + A 25MHz reference, a free-running 125MHz and a recovered 125MHz. + The phy can also automatically switch between the reference and the + respective 125MHz clocks based on its internal state. + $ref: /schemas/types.yaml#/definitions/string + enum: + - 25mhz-reference + - 125mhz-free-running + - 125mhz-recovered + - adaptive-free-running + - adaptive-recovered + + adi,phy-output-reference-clock: + description: Enable 25MHz reference clock output on CLK25_REF pin. + $ref: /schemas/types.yaml#/definitions/flag + unevaluatedProperties: false examples: