| Message ID | 20220428082848.12191-4-josua@solid-run.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | adin: add support for clock output | expand |
On Thu, Apr 28, 2022 at 11:28:48AM +0300, Josua Mayer wrote: > Since SoM revision 1.9 the PHY has been replaced with an ADIN1300, > add an entry for it next to the original. > > As Russell King pointed out, additional phy nodes cause warnings like: > mdio_bus 2188000.ethernet-1: MDIO device at address 1 is missing > To avoid this the new node has its status set to disabled. U-Boot will > be modified to enable the appropriate phy node after probing. > > The existing ar8035 nodes have to stay enabled by default to avoid > breaking existing systems when they update Linux only. > > Co-developed-by: Alvaro Karsz <alvaro.karsz@solid-run.com> > Signed-off-by: Alvaro Karsz <alvaro.karsz@solid-run.com> > Signed-off-by: Josua Mayer <josua@solid-run.com> > --- > V2 -> V3: new phy node status set disabled > V1 -> V2: changed dts property name > > arch/arm/boot/dts/imx6qdl-sr-som.dtsi | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/arch/arm/boot/dts/imx6qdl-sr-som.dtsi b/arch/arm/boot/dts/imx6qdl-sr-som.dtsi > index f86efd0ccc40..ce543e325cd3 100644 > --- a/arch/arm/boot/dts/imx6qdl-sr-som.dtsi > +++ b/arch/arm/boot/dts/imx6qdl-sr-som.dtsi > @@ -83,6 +83,16 @@ ethernet-phy@4 { > qca,clk-out-frequency = <125000000>; > qca,smarteee-tw-us-1g = <24>; > }; > + > + /* > + * ADIN1300 (som rev 1.9 or later) is always at address 1. It > + * will be enabled automatically by U-Boot if detected. > + */ > + ethernet-phy@1 { > + reg = <1>; > + adi,phy-output-clock = "125mhz-free-running"; Hmm, I failed to find binding doc for this. Shawn > + status = "disabled"; > + }; > }; > }; > > -- > 2.34.1 >
diff --git a/arch/arm/boot/dts/imx6qdl-sr-som.dtsi b/arch/arm/boot/dts/imx6qdl-sr-som.dtsi index f86efd0ccc40..ce543e325cd3 100644 --- a/arch/arm/boot/dts/imx6qdl-sr-som.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sr-som.dtsi @@ -83,6 +83,16 @@ ethernet-phy@4 { qca,clk-out-frequency = <125000000>; qca,smarteee-tw-us-1g = <24>; }; + + /* + * ADIN1300 (som rev 1.9 or later) is always at address 1. It + * will be enabled automatically by U-Boot if detected. + */ + ethernet-phy@1 { + reg = <1>; + adi,phy-output-clock = "125mhz-free-running"; + status = "disabled"; + }; }; };