Message ID | 20220531113058.23708-2-s-vadapalli@ti.com (mailing list archive) |
---|---|
State | Changes Requested |
Delegated to: | Netdev Maintainers |
Headers | show |
Series | Add support for QSGMII mode to am65-cpsw driver | expand |
Context | Check | Description |
---|---|---|
netdev/tree_selection | success | Guessing tree name failed - patch did not apply |
diff --git a/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml b/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml index b8281d8be940..f9e6eb600b41 100644 --- a/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml +++ b/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml @@ -110,7 +110,7 @@ properties: const: 0 patternProperties: - port@[1-2]: + port@[1-4]: type: object description: CPSWxG NUSS external ports @@ -119,7 +119,7 @@ properties: properties: reg: minimum: 1 - maximum: 2 + maximum: 4 description: CPSW port number phys:
Update bindings for TI K3 J7200 SoC which contains 5 ports (4 external ports) in order to support CPSW5G. Changes made: - Change pattern properties to support 4 ports. - Change maximum number of CPSW ports to 4. Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> --- .../devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)