From patchwork Tue Jun 14 17:47:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maciej Fijalkowski X-Patchwork-Id: 12881323 X-Patchwork-Delegate: bpf@iogearbox.net Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6AB53CCA47F for ; Tue, 14 Jun 2022 17:48:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344484AbiFNRsG (ORCPT ); Tue, 14 Jun 2022 13:48:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38592 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244080AbiFNRsF (ORCPT ); Tue, 14 Jun 2022 13:48:05 -0400 Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 922D23120C; Tue, 14 Jun 2022 10:48:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1655228884; x=1686764884; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=D5KPza/kgLdh1wzhegt7VKlkovGKoDj3NRf/x28hTqA=; b=GAu95jyYjApkgSfJKgh1MMS+zuaB0Jx6bs3RBSAoBe0YRQ/XvIme6Mwk HroOyDPEM0CZOax6HbN9LDf+9u496p0HvUjHI6rCD45TKFKS1lN8aJioe yWzOxKYSJ36JUhe5EmlE1G+JfztrpRcI96H86GDDrXucOZBj+W3DuK6co by5KPHfKaro6U33GhJOYOgkBuI2zeAKvaHtwLKh1YaYI5EbpSYaj541WO OxuMpyEkYs8TQyx5WG+rAXjueqvlcIAs5NTdRbdW/SZQczXBIFWHSGHIU EW5e/9//fVuZeHri1mx9KmnuAh95ye7UY+gaQwdZ0XNYX/0wKUGN5W5hZ w==; X-IronPort-AV: E=McAfee;i="6400,9594,10378"; a="340356779" X-IronPort-AV: E=Sophos;i="5.91,300,1647327600"; d="scan'208";a="340356779" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Jun 2022 10:47:58 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,300,1647327600"; d="scan'208";a="570110075" Received: from boxer.igk.intel.com ([10.102.20.173]) by orsmga002.jf.intel.com with ESMTP; 14 Jun 2022 10:47:56 -0700 From: Maciej Fijalkowski To: bpf@vger.kernel.org, ast@kernel.org, daniel@iogearbox.net Cc: netdev@vger.kernel.org, magnus.karlsson@intel.com, bjorn@kernel.org, Maciej Fijalkowski Subject: [PATCH v2 bpf-next 02/10] ice: check DD bit on Rx descriptor rather than (EOP | RS) Date: Tue, 14 Jun 2022 19:47:41 +0200 Message-Id: <20220614174749.901044-3-maciej.fijalkowski@intel.com> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20220614174749.901044-1-maciej.fijalkowski@intel.com> References: <20220614174749.901044-1-maciej.fijalkowski@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: bpf@iogearbox.net Tx side sets EOP and RS bits on descriptors to indicate that a particular descriptor is the last one and needs to generate an irq when it was sent. These bits should not be checked on completion path regardless whether it's the Tx or the Rx. DD bit serves this purpose and it indicates that a particular descriptor is either for Rx or was successfully Txed. Look at DD bit being set in ice_lbtest_receive_frames() instead of EOP and RS pair. Signed-off-by: Maciej Fijalkowski --- drivers/net/ethernet/intel/ice/ice_ethtool.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ethernet/intel/ice/ice_ethtool.c b/drivers/net/ethernet/intel/ice/ice_ethtool.c index 1e71b70f0e52..b6275a29fa0d 100644 --- a/drivers/net/ethernet/intel/ice/ice_ethtool.c +++ b/drivers/net/ethernet/intel/ice/ice_ethtool.c @@ -658,7 +658,7 @@ static int ice_lbtest_receive_frames(struct ice_rx_ring *rx_ring) rx_desc = ICE_RX_DESC(rx_ring, i); if (!(rx_desc->wb.status_error0 & - cpu_to_le16(ICE_TX_DESC_CMD_EOP | ICE_TX_DESC_CMD_RS))) + cpu_to_le16(BIT(ICE_RX_FLEX_DESC_STATUS0_DD_S)))) continue; rx_buf = &rx_ring->rx_buf[i];