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[2003:e4:1f12:c800:f22f:74ff:fe1f:3a53]) by smtp.gmail.com with ESMTPSA id f190-20020a1c38c7000000b0039c5328ad92sm23605784wma.41.2022.07.06.14.33.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Jul 2022 14:33:05 -0700 (PDT) From: Thierry Reding To: Thierry Reding Cc: Jon Hunter , Rob Herring , Krzysztof Kozlowski , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Bhadram Varka , devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, netdev@vger.kernel.org, Krzysztof Kozlowski Subject: [PATCH v3 3/9] dt-bindings: memory: Add Tegra234 MGBE memory clients Date: Wed, 6 Jul 2022 23:32:49 +0200 Message-Id: <20220706213255.1473069-4-thierry.reding@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220706213255.1473069-1-thierry.reding@gmail.com> References: <20220706213255.1473069-1-thierry.reding@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org From: Thierry Reding Add the memory client and stream ID definitions for the Multi-Gigabit Ethernet (MGBE) hardware found on NVIDIA Tegra234 SoCs. Signed-off-by: Bhadram Varka Acked-by: Krzysztof Kozlowski Signed-off-by: Thierry Reding --- include/dt-bindings/memory/tegra234-mc.h | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/include/dt-bindings/memory/tegra234-mc.h b/include/dt-bindings/memory/tegra234-mc.h index 35491bacbc86..8c785c1937f2 100644 --- a/include/dt-bindings/memory/tegra234-mc.h +++ b/include/dt-bindings/memory/tegra234-mc.h @@ -12,11 +12,15 @@ #define TEGRA234_SID_APE 0x02 #define TEGRA234_SID_HDA 0x03 #define TEGRA234_SID_GPCDMA 0x04 +#define TEGRA234_SID_MGBE 0x06 #define TEGRA234_SID_PCIE0 0x12 #define TEGRA234_SID_PCIE4 0x13 #define TEGRA234_SID_PCIE5 0x14 #define TEGRA234_SID_PCIE6 0x15 #define TEGRA234_SID_PCIE9 0x1f +#define TEGRA234_SID_MGBE_VF1 0x49 +#define TEGRA234_SID_MGBE_VF2 0x4a +#define TEGRA234_SID_MGBE_VF3 0x4b /* NISO1 stream IDs */ #define TEGRA234_SID_SDMMC4 0x02 @@ -63,8 +67,24 @@ #define TEGRA234_MEMORY_CLIENT_PCIE10AR1 0x48 /* PCIE7r1 read clients */ #define TEGRA234_MEMORY_CLIENT_PCIE7AR1 0x49 +/* MGBE0 read client */ +#define TEGRA234_MEMORY_CLIENT_MGBEARD 0x58 +/* MGBEB read client */ +#define TEGRA234_MEMORY_CLIENT_MGBEBRD 0x59 +/* MGBEC read client */ +#define TEGRA234_MEMORY_CLIENT_MGBECRD 0x5a +/* MGBED read client */ +#define TEGRA234_MEMORY_CLIENT_MGBEDRD 0x5b +/* MGBE0 write client */ +#define TEGRA234_MEMORY_CLIENT_MGBEAWR 0x5c +/* MGBEB write client */ +#define TEGRA234_MEMORY_CLIENT_MGBEBWR 0x5f +/* MGBEC write client */ +#define TEGRA234_MEMORY_CLIENT_MGBECWR 0x61 /* sdmmcd memory read client */ #define TEGRA234_MEMORY_CLIENT_SDMMCRAB 0x63 +/* MGBED write client */ +#define TEGRA234_MEMORY_CLIENT_MGBEDWR 0x65 /* sdmmcd memory write client */ #define TEGRA234_MEMORY_CLIENT_SDMMCWAB 0x67 /* EQOS read client */