From patchwork Fri Jul 8 04:41:42 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ratheesh Kannoth X-Patchwork-Id: 12910548 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4EEA5C43334 for ; Fri, 8 Jul 2022 04:42:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237201AbiGHEmV (ORCPT ); Fri, 8 Jul 2022 00:42:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43026 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237192AbiGHEmS (ORCPT ); Fri, 8 Jul 2022 00:42:18 -0400 Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 39D0961D76; Thu, 7 Jul 2022 21:42:16 -0700 (PDT) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 2681tO1t031308; Thu, 7 Jul 2022 21:42:11 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=a51kSL5pP0Arjd3xQWuFH6EnupWV13FhDA9OUm5CtYc=; b=FoqQSHIz5K4sOHfOMv64aZPCcNxtlpTxhWpW2iJlrWZM8Gqe6ZcknjR0m4EoTNqiVuSK Wo4v49cqiopVICP5qWDXslS97eGp9hxay0xsNtZ9AZRifuHGCu8YLW5MLHzQH49YFo0i XmojkRHswxbyHYr2rfU2ZfWsacI0eG1E8xhCUj2nWljAH449szwr0NcD4xSd0cPL9rVy /l4MswI0hqffQJ0fEtuE71wewtuBYR2MGqIpe+vJicxUbR6GT9dNKufadXceTVYWT+U1 3BYhtSgL6BUI5/bjRfDgSmLTUTEcQxbmlMatCg8QrpFGztUJ1hJXEknZDhtJL7JV0/eq Xg== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3h6bay8ej5-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Thu, 07 Jul 2022 21:42:10 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 7 Jul 2022 21:42:09 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 7 Jul 2022 21:42:09 -0700 Received: from IPBU-BLR-SERVER1.marvell.com (IPBU-BLR-SERVER1.marvell.com [10.28.8.41]) by maili.marvell.com (Postfix) with ESMTP id 5CF553F7078; Thu, 7 Jul 2022 21:42:06 -0700 (PDT) From: Ratheesh Kannoth To: , CC: , , , , , Ratheesh Kannoth Subject: [net-next PATCH v5 03/12] octeontx2-af: Exact match scan from kex profile Date: Fri, 8 Jul 2022 10:11:42 +0530 Message-ID: <20220708044151.2972645-4-rkannoth@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220708044151.2972645-1-rkannoth@marvell.com> References: <20220708044151.2972645-1-rkannoth@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: 90NvbU1enDN1TFiBZAmUXaxEtzUhyQ4q X-Proofpoint-ORIG-GUID: 90NvbU1enDN1TFiBZAmUXaxEtzUhyQ4q X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.883,Hydra:6.0.517,FMLib:17.11.122.1 definitions=2022-07-08_04,2022-06-28_01,2022-06-22_01 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org CN10KB silicon supports exact match table. Scanning KEX profile should check for exact match feature is enabled and then set profile masks properly. These kex profile masks are required to configure NPC MCAM drop rules. If there is a miss in exact match table, these drop rules will drop those packets. Signed-off-by: Ratheesh Kannoth --- .../net/ethernet/marvell/octeontx2/af/npc.h | 1 + .../marvell/octeontx2/af/rvu_npc_fs.c | 37 +++++++++++++++++-- 2 files changed, 35 insertions(+), 3 deletions(-) diff --git a/drivers/net/ethernet/marvell/octeontx2/af/npc.h b/drivers/net/ethernet/marvell/octeontx2/af/npc.h index 69f9517c61f4..f187293e3e08 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/npc.h +++ b/drivers/net/ethernet/marvell/octeontx2/af/npc.h @@ -208,6 +208,7 @@ enum key_fields { NPC_ERRLEV, NPC_ERRCODE, NPC_LXMB, + NPC_EXACT_RESULT, NPC_LA, NPC_LB, NPC_LC, diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c index 08a0fa44857e..4a8618731fc6 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c @@ -229,6 +229,25 @@ static bool npc_check_field(struct rvu *rvu, int blkaddr, enum key_fields type, return true; } +static void npc_scan_exact_result(struct npc_mcam *mcam, u8 bit_number, + u8 key_nibble, u8 intf) +{ + u8 offset = (key_nibble * 4) % 64; /* offset within key word */ + u8 kwi = (key_nibble * 4) / 64; /* which word in key */ + u8 nr_bits = 4; /* bits in a nibble */ + u8 type; + + switch (bit_number) { + case 40 ... 43: + type = NPC_EXACT_RESULT; + break; + + default: + return; + } + npc_set_kw_masks(mcam, type, nr_bits, kwi, offset, intf); +} + static void npc_scan_parse_result(struct npc_mcam *mcam, u8 bit_number, u8 key_nibble, u8 intf) { @@ -511,8 +530,8 @@ static int npc_scan_kex(struct rvu *rvu, int blkaddr, u8 intf) { struct npc_mcam *mcam = &rvu->hw->mcam; u8 lid, lt, ld, bitnr; + u64 cfg, masked_cfg; u8 key_nibble = 0; - u64 cfg; /* Scan and note how parse result is going to be in key. * A bit set in PARSE_NIBBLE_ENA corresponds to a nibble from @@ -520,12 +539,24 @@ static int npc_scan_kex(struct rvu *rvu, int blkaddr, u8 intf) * will be concatenated in key. */ cfg = rvu_read64(rvu, blkaddr, NPC_AF_INTFX_KEX_CFG(intf)); - cfg &= NPC_PARSE_NIBBLE; - for_each_set_bit(bitnr, (unsigned long *)&cfg, 31) { + masked_cfg = cfg & NPC_PARSE_NIBBLE; + for_each_set_bit(bitnr, (unsigned long *)&masked_cfg, 31) { npc_scan_parse_result(mcam, bitnr, key_nibble, intf); key_nibble++; } + /* Ignore exact match bits for mcam entries except the first rule + * which is drop on hit. This first rule is configured explitcitly by + * exact match code. + */ + masked_cfg = cfg & NPC_EXACT_NIBBLE; + bitnr = NPC_EXACT_NIBBLE_START; + for_each_set_bit_from(bitnr, (unsigned long *)&masked_cfg, + NPC_EXACT_NIBBLE_START) { + npc_scan_exact_result(mcam, bitnr, key_nibble, intf); + key_nibble++; + } + /* Scan and note how layer data is going to be in key */ for (lid = 0; lid < NPC_MAX_LID; lid++) { for (lt = 0; lt < NPC_MAX_LT; lt++) {