Message ID | 20220818030054.1010660-2-wei.fang@nxp.com (mailing list archive) |
---|---|
State | Accepted |
Commit | 2e7f089914b94450d4c3b6408e22af3f016fc332 |
Delegated to: | Netdev Maintainers |
Headers | show |
Series | Add DT property to disable hibernation mode | expand |
On Thu, Aug 18, 2022 at 11:00:53AM +0800, wei.fang@nxp.com wrote: > From: Wei Fang <wei.fang@nxp.com> > > The hibernation mode of Atheros AR803x PHYs defaults to be > enabled after hardware reset. When the cable is unplugged, > the PHY will enter hibernation mode after about 10 seconds > and the PHY clocks will be stopped to save power. > However, some MACs need the phy output clock for proper > functioning of their logic. For instance, stmmac needs the > RX_CLK of PHY for software reset to complete. > Therefore, add a DT property to configure the PHY to disable > this hardware hibernation mode. > > Signed-off-by: Wei Fang <wei.fang@nxp.com> > --- > V2 change: > 1. Add subject prefix. > 2. Modify the property name and description to make them clear. > V3 change: > According to Andrew's suggestion, remodify the description to > make it clear. > --- > Documentation/devicetree/bindings/net/qca,ar803x.yaml | 8 ++++++++ > 1 file changed, 8 insertions(+) Reviewed-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/net/qca,ar803x.yaml b/Documentation/devicetree/bindings/net/qca,ar803x.yaml index b3d4013b7ca6..161d28919316 100644 --- a/Documentation/devicetree/bindings/net/qca,ar803x.yaml +++ b/Documentation/devicetree/bindings/net/qca,ar803x.yaml @@ -40,6 +40,14 @@ properties: Only supported on the AR8031. type: boolean + qca,disable-hibernation-mode: + description: | + Disable Atheros AR803X PHYs hibernation mode. If present, indicates + that the hardware of PHY will not enter power saving mode when the + cable is disconnected. And the RX_CLK always keeps outputting a + valid clock. + type: boolean + qca,smarteee-tw-us-100m: description: EEE Tw parameter for 100M links. $ref: /schemas/types.yaml#/definitions/uint32