Message ID | 20220905162132.2943088-8-colin.foster@in-advantage.com (mailing list archive) |
---|---|
State | Not Applicable |
Delegated to: | Netdev Maintainers |
Headers | show |
Series | add support for VSC7512 control over SPI | expand |
Context | Check | Description |
---|---|---|
netdev/tree_selection | success | Guessed tree name to be net-next |
netdev/fixes_present | success | Fixes tag not required for -next series |
netdev/subject_prefix | success | Link |
netdev/cover_letter | success | Series has a cover letter |
netdev/patch_count | success | Link |
netdev/header_inline | success | No static functions without inline keyword in header files |
netdev/build_32bit | success | Errors and warnings before: 0 this patch: 0 |
netdev/cc_maintainers | success | CCed 5 of 5 maintainers |
netdev/build_clang | success | Errors and warnings before: 0 this patch: 0 |
netdev/module_param | success | Was 0 now: 0 |
netdev/verify_signedoff | success | Signed-off-by tag matches author and committer |
netdev/check_selftest | success | No net selftest shell script |
netdev/verify_fixes | success | No Fixes tag |
netdev/build_allmodconfig_warn | success | Errors and warnings before: 0 this patch: 0 |
netdev/checkpatch | success | total: 0 errors, 0 warnings, 0 checks, 167 lines checked |
netdev/kdoc | success | Errors and warnings before: 0 this patch: 0 |
netdev/source_inline | success | Was 0 now: 0 |
On Mon, 05 Sep 2022, Colin Foster wrote: > Add devicetree bindings for SPI-controlled Ocelot chips, specifically the > VSC7512. > > Signed-off-by: Colin Foster <colin.foster@in-advantage.com> > Reviewed-by: Rob Herring <robh@kernel.org> > Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> > --- > > (No changes since v14) > > v14 > * Add Vladimir Reviewed tag > > --- > .../devicetree/bindings/mfd/mscc,ocelot.yaml | 160 ++++++++++++++++++ > MAINTAINERS | 1 + > 2 files changed, 161 insertions(+) > create mode 100644 Documentation/devicetree/bindings/mfd/mscc,ocelot.yaml Applied, thanks.
On 05/09/2022 18:21, Colin Foster wrote: > Add devicetree bindings for SPI-controlled Ocelot chips, specifically the > VSC7512. > > Signed-off-by: Colin Foster <colin.foster@in-advantage.com> > Reviewed-by: Rob Herring <robh@kernel.org> > Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> > --- > > (No changes since v14) > > v14 > * Add Vladimir Reviewed tag > > --- > .../devicetree/bindings/mfd/mscc,ocelot.yaml | 160 ++++++++++++++++++ > MAINTAINERS | 1 + > 2 files changed, 161 insertions(+) > create mode 100644 Documentation/devicetree/bindings/mfd/mscc,ocelot.yaml > > diff --git a/Documentation/devicetree/bindings/mfd/mscc,ocelot.yaml b/Documentation/devicetree/bindings/mfd/mscc,ocelot.yaml > new file mode 100644 > index 000000000000..8bf45a5673a4 > --- /dev/null > +++ b/Documentation/devicetree/bindings/mfd/mscc,ocelot.yaml > @@ -0,0 +1,160 @@ > +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */ > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/mfd/mscc,ocelot.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Ocelot Externally-Controlled Ethernet Switch > + > +maintainers: > + - Colin Foster <colin.foster@in-advantage.com> > + > +description: | > + The Ocelot ethernet switch family contains chips that have an internal CPU > + (VSC7513, VSC7514) and chips that don't (VSC7511, VSC7512). All switches have > + the option to be controlled externally, which is the purpose of this driver. "Driver" as in Linux driver? If so, drop it. Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/mfd/mscc,ocelot.yaml b/Documentation/devicetree/bindings/mfd/mscc,ocelot.yaml new file mode 100644 index 000000000000..8bf45a5673a4 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/mscc,ocelot.yaml @@ -0,0 +1,160 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */ +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/mscc,ocelot.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Ocelot Externally-Controlled Ethernet Switch + +maintainers: + - Colin Foster <colin.foster@in-advantage.com> + +description: | + The Ocelot ethernet switch family contains chips that have an internal CPU + (VSC7513, VSC7514) and chips that don't (VSC7511, VSC7512). All switches have + the option to be controlled externally, which is the purpose of this driver. + + The switch family is a multi-port networking switch that supports many + interfaces. Additionally, the device can perform pin control, MDIO buses, and + external GPIO expanders. + +properties: + compatible: + enum: + - mscc,vsc7512 + + reg: + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + + spi-max-frequency: + maxItems: 1 + +patternProperties: + "^pinctrl@[0-9a-f]+$": + type: object + $ref: /schemas/pinctrl/mscc,ocelot-pinctrl.yaml + + "^gpio@[0-9a-f]+$": + type: object + $ref: /schemas/pinctrl/microchip,sparx5-sgpio.yaml + properties: + compatible: + enum: + - mscc,ocelot-sgpio + + "^mdio@[0-9a-f]+$": + type: object + $ref: /schemas/net/mscc,miim.yaml + properties: + compatible: + enum: + - mscc,ocelot-miim + +required: + - compatible + - reg + - '#address-cells' + - '#size-cells' + - spi-max-frequency + +additionalProperties: false + +examples: + - | + ocelot_clock: ocelot-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <125000000>; + }; + + spi { + #address-cells = <1>; + #size-cells = <0>; + + soc@0 { + compatible = "mscc,vsc7512"; + spi-max-frequency = <2500000>; + reg = <0>; + #address-cells = <1>; + #size-cells = <1>; + + mdio@7107009c { + compatible = "mscc,ocelot-miim"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x7107009c 0x24>; + + sw_phy0: ethernet-phy@0 { + reg = <0x0>; + }; + }; + + mdio@710700c0 { + compatible = "mscc,ocelot-miim"; + pinctrl-names = "default"; + pinctrl-0 = <&miim1_pins>; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x710700c0 0x24>; + + sw_phy4: ethernet-phy@4 { + reg = <0x4>; + }; + }; + + gpio: pinctrl@71070034 { + compatible = "mscc,ocelot-pinctrl"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&gpio 0 0 22>; + reg = <0x71070034 0x6c>; + + sgpio_pins: sgpio-pins { + pins = "GPIO_0", "GPIO_1", "GPIO_2", "GPIO_3"; + function = "sg0"; + }; + + miim1_pins: miim1-pins { + pins = "GPIO_14", "GPIO_15"; + function = "miim"; + }; + }; + + gpio@710700f8 { + compatible = "mscc,ocelot-sgpio"; + #address-cells = <1>; + #size-cells = <0>; + bus-frequency = <12500000>; + clocks = <&ocelot_clock>; + microchip,sgpio-port-ranges = <0 15>; + pinctrl-names = "default"; + pinctrl-0 = <&sgpio_pins>; + reg = <0x710700f8 0x100>; + + sgpio_in0: gpio@0 { + compatible = "microchip,sparx5-sgpio-bank"; + reg = <0>; + gpio-controller; + #gpio-cells = <3>; + ngpios = <64>; + }; + + sgpio_out1: gpio@1 { + compatible = "microchip,sparx5-sgpio-bank"; + reg = <1>; + gpio-controller; + #gpio-cells = <3>; + ngpios = <64>; + }; + }; + }; + }; + +... + diff --git a/MAINTAINERS b/MAINTAINERS index e0732e9f9090..a5df3b0b9601 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -14744,6 +14744,7 @@ F: tools/testing/selftests/drivers/net/ocelot/* OCELOT EXTERNAL SWITCH CONTROL M: Colin Foster <colin.foster@in-advantage.com> S: Supported +F: Documentation/devicetree/bindings/mfd/mscc,ocelot.yaml F: include/linux/mfd/ocelot.h OCXL (Open Coherent Accelerator Processor Interface OpenCAPI) DRIVER