| Message ID | 20220912105137.302648-1-biju.das.jz@bp.renesas.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Netdev Maintainers |
| Headers | show |
| Series | [net-next,v2] ravb: Add RZ/G2L MII interface support | expand |
On 9/12/22 1:51 PM, Biju Das wrote: > EMAC IP found on RZ/G2L Gb ethernet supports MII interface. > This patch adds support for selecting MII interface mode. > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> [...] > diff --git a/drivers/net/ethernet/renesas/ravb.h b/drivers/net/ethernet/renesas/ravb.h > index b980bce763d3..0c7c0d404dcb 100644 > --- a/drivers/net/ethernet/renesas/ravb.h > +++ b/drivers/net/ethernet/renesas/ravb.h [...] > @@ -965,6 +966,10 @@ enum CXR31_BIT { > CXR31_SEL_LINK1 = 0x00000008, > }; > > +enum CXR35_BIT { > + CXR35_SEL_MII = 0x03E80002, I'd really prefer that SEL_XMII[1:0] and HALFCYC_CLKSW[15:0] fields to be explicitly spelled out here (as they are in the manual)... [...] MBR, Sergey
Hi Sergey Shtylyov, Thanks for the feed back. > Subject: Re: [PATCH net-next v2] ravb: Add RZ/G2L MII interface support > > On 9/12/22 1:51 PM, Biju Das wrote: > > > EMAC IP found on RZ/G2L Gb ethernet supports MII interface. > > This patch adds support for selecting MII interface mode. > > > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > [...] > > > diff --git a/drivers/net/ethernet/renesas/ravb.h > > b/drivers/net/ethernet/renesas/ravb.h > > index b980bce763d3..0c7c0d404dcb 100644 > > --- a/drivers/net/ethernet/renesas/ravb.h > > +++ b/drivers/net/ethernet/renesas/ravb.h > [...] > > @@ -965,6 +966,10 @@ enum CXR31_BIT { > > CXR31_SEL_LINK1 = 0x00000008, > > }; > > > > +enum CXR35_BIT { > > + CXR35_SEL_MII = 0x03E80002, > > I'd really prefer that SEL_XMII[1:0] and HALFCYC_CLKSW[15:0] fields to > be explicitly spelled out here (as they are in the manual)... OK , will add CXR35_HALFCYC_CLKSW_1000 and CXR35_SEL_XMII_MII. Cheers, Biju
diff --git a/drivers/net/ethernet/renesas/ravb.h b/drivers/net/ethernet/renesas/ravb.h index b980bce763d3..0c7c0d404dcb 100644 --- a/drivers/net/ethernet/renesas/ravb.h +++ b/drivers/net/ethernet/renesas/ravb.h @@ -189,6 +189,7 @@ enum ravb_reg { PSR = 0x0528, PIPR = 0x052c, CXR31 = 0x0530, /* RZ/G2L only */ + CXR35 = 0x0540, /* RZ/G2L only */ MPR = 0x0558, PFTCR = 0x055c, PFRCR = 0x0560, @@ -965,6 +966,10 @@ enum CXR31_BIT { CXR31_SEL_LINK1 = 0x00000008, }; +enum CXR35_BIT { + CXR35_SEL_MII = 0x03E80002, +}; + enum CSR0_BIT { CSR0_TPE = 0x00000010, CSR0_RPE = 0x00000020, diff --git a/drivers/net/ethernet/renesas/ravb_main.c b/drivers/net/ethernet/renesas/ravb_main.c index b357ac4c56c5..6f6bf11995b0 100644 --- a/drivers/net/ethernet/renesas/ravb_main.c +++ b/drivers/net/ethernet/renesas/ravb_main.c @@ -540,7 +540,13 @@ static void ravb_emac_init_gbeth(struct net_device *ndev) /* E-MAC interrupt enable register */ ravb_write(ndev, ECSIPR_ICDIP, ECSIPR); - ravb_modify(ndev, CXR31, CXR31_SEL_LINK0 | CXR31_SEL_LINK1, CXR31_SEL_LINK0); + if (priv->phy_interface == PHY_INTERFACE_MODE_MII) { + ravb_modify(ndev, CXR31, CXR31_SEL_LINK0 | CXR31_SEL_LINK1, 0); + ravb_write(ndev, CXR35_SEL_MII, CXR35); + } else { + ravb_modify(ndev, CXR31, CXR31_SEL_LINK0 | CXR31_SEL_LINK1, + CXR31_SEL_LINK0); + } } static void ravb_emac_init_rcar(struct net_device *ndev)
EMAC IP found on RZ/G2L Gb ethernet supports MII interface. This patch adds support for selecting MII interface mode. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> --- v1->v2: * Fixed spaces->Tab around CXR35 description. --- drivers/net/ethernet/renesas/ravb.h | 5 +++++ drivers/net/ethernet/renesas/ravb_main.c | 8 +++++++- 2 files changed, 12 insertions(+), 1 deletion(-)