From patchwork Thu Sep 29 12:03:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Machon X-Patchwork-Id: 12993965 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CC511C433FE for ; Thu, 29 Sep 2022 11:55:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235610AbiI2LzC (ORCPT ); Thu, 29 Sep 2022 07:55:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43304 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235518AbiI2Lyy (ORCPT ); Thu, 29 Sep 2022 07:54:54 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 67294E56; Thu, 29 Sep 2022 04:54:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1664452477; x=1695988477; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=qJ+zrxUpSF77Im9X9JIA7IwvzNSfnsnDEQ1UQw2LDyw=; b=zz0CYyXxRoS9FY45BGBd/a+pRpEahmsJ+pM8m2k5tRopT4zszuoI3zbQ qmW+OV/07F7IipTOI+CiBAAa9kH+QPCWRB5orAehs22g8e2eMUS28rfLo nRPw6JhP9Gt5nCxFQcl5zQk/YpW4XV6y53tGsWAlyoEgYDTrw+f1qeh2m RqkULgk2kZbde9Yf8vl23nXD1b3pQUu9oNt2HUZ6t/CjPsJJaakp6UJPX hzB42rIa1R5uKAzbALGCgaH67SmUJd3L65aqGa8ikachiwvYdXVNxggmz x2uEKd78PLPmb0PdSjKRcFnpAhfD9f9dCtG/ZAr2+9e/BSbR4ZT6Z9LWA w==; X-IronPort-AV: E=Sophos;i="5.93,355,1654585200"; d="scan'208";a="182465579" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 29 Sep 2022 04:54:35 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Thu, 29 Sep 2022 04:54:34 -0700 Received: from DEN-LT-70577.microchip.com (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.12 via Frontend Transport; Thu, 29 Sep 2022 04:54:30 -0700 From: Daniel Machon To: CC: , , , , , , , , , , , , , , , , , Subject: [PATCH net-next 4/6] net: microchip: sparx5: add support for apptrust Date: Thu, 29 Sep 2022 14:03:40 +0200 Message-ID: <20220929120342.2069359-5-daniel.machon@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220929120342.2069359-1-daniel.machon@microchip.com> References: <20220929120342.2069359-1-daniel.machon@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Make use of set/getapptrust() to implement per-selector trust and trust order. Signed-off-by: Daniel Machon --- .../ethernet/microchip/sparx5/sparx5_dcb.c | 116 ++++++++++++++++++ .../ethernet/microchip/sparx5/sparx5_port.c | 4 +- .../ethernet/microchip/sparx5/sparx5_port.h | 2 + .../ethernet/microchip/sparx5/sparx5_qos.c | 4 + .../ethernet/microchip/sparx5/sparx5_qos.h | 3 + 5 files changed, 127 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_dcb.c b/drivers/net/ethernet/microchip/sparx5/sparx5_dcb.c index db17c124dac8..10aeb422b1ae 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_dcb.c +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_dcb.c @@ -8,6 +8,22 @@ #include "sparx5_port.h" +static const struct sparx5_dcb_apptrust { + u8 selectors[256]; + int nselectors; + char *names; +} *apptrust[SPX5_PORTS]; + +/* Sparx5 supported apptrust configurations */ +static const struct sparx5_dcb_apptrust apptrust_conf[4] = { + /* Empty *must* be first */ + { { 0 }, 0, "empty" }, + { { IEEE_8021QAZ_APP_SEL_DSCP }, 1, "dscp" }, + { { DCB_APP_SEL_PCP }, 1, "pcp" }, + { { IEEE_8021QAZ_APP_SEL_DSCP, + DCB_APP_SEL_PCP }, 2, "dscp pcp" }, +}; + /* Validate app entry. * * Check for valid selectors and valid protocol and priority ranges. @@ -37,12 +53,59 @@ static int sparx5_dcb_app_validate(struct net_device *dev, return err; } +/* Validate apptrust configuration. + * + * Return index of supported apptrust configuration if valid, otherwise return + * error. + */ +static int sparx5_dcb_apptrust_validate(struct net_device *dev, u8 *selectors, + int nselectors, int *err) +{ + bool match; + int i, ii; + + for (i = 0; i < ARRAY_SIZE(apptrust_conf); i++) { + match = true; + for (ii = 0; ii < nselectors; ii++) { + if (apptrust_conf[i].selectors[ii] != + *(selectors + ii)) { + match = false; + break; + } + } + if (match) + break; + } + + /* Requested trust configuration is not supported */ + if (!match) { + netdev_err(dev, "Valid apptrust configurations are:\n"); + for (i = 0; i < ARRAY_SIZE(apptrust_conf); i++) + pr_info("order: %s\n", apptrust_conf[i].names); + *err = -EOPNOTSUPP; + } + + return i; +} + +static bool sparx5_dcb_apptrust_contains(int portno, u8 selector) +{ + int i; + + for (i = 0; i < IEEE_8021QAZ_APP_SEL_MAX + 1; i++) + if (apptrust[portno]->selectors[i] == selector) + return true; + + return false; +} + static int sparx5_dcb_app_update(struct net_device *dev) { struct dcb_app app_itr = { .selector = DCB_APP_SEL_PCP }; struct sparx5_port *port = netdev_priv(dev); struct sparx5_port_qos_pcp_map *pcp_map; struct sparx5_port_qos qos = {0}; + int portno = port->portno; int i; pcp_map = &qos.pcp.map; @@ -53,6 +116,12 @@ static int sparx5_dcb_app_update(struct net_device *dev) pcp_map->map[i] = dcb_getapp(dev, &app_itr); } + /* Enable use of pcp for queue classification ? */ + if (sparx5_dcb_apptrust_contains(portno, DCB_APP_SEL_PCP)) { + qos.pcp.qos_enable = true; + qos.pcp.dp_enable = qos.pcp.qos_enable; + } + return sparx5_port_qos_set(port, &qos); } @@ -95,7 +164,54 @@ static int sparx5_dcb_ieee_delapp(struct net_device *dev, struct dcb_app *app) return sparx5_dcb_app_update(dev); } +static int sparx5_dcb_setapptrust(struct net_device *dev, u8 *selectors, + int nselectors) +{ + struct sparx5_port *port = netdev_priv(dev); + int err = 0, idx; + + idx = sparx5_dcb_apptrust_validate(dev, selectors, nselectors, &err); + if (err < 0) + return err; + + apptrust[port->portno] = &apptrust_conf[idx]; + + return sparx5_dcb_app_update(dev); +} + +static int sparx5_dcb_getapptrust(struct net_device *dev, u8 *selectors, + int *nselectors) +{ + struct sparx5_port *port = netdev_priv(dev); + const struct sparx5_dcb_apptrust *trust; + + trust = apptrust[port->portno]; + + memcpy(selectors, trust->selectors, trust->nselectors); + *nselectors = trust->nselectors; + + return 0; +} + +int sparx5_dcb_init(struct sparx5 *sparx5) +{ + struct sparx5_port *port; + int i; + + for (i = 0; i < SPX5_PORTS; i++) { + port = sparx5->ports[i]; + if (!port) + continue; + /* Initialize [dscp, pcp] default trust */ + apptrust[port->portno] = &apptrust_conf[3]; + } + + return sparx5_dcb_app_update(port->ndev); +} + const struct dcbnl_rtnl_ops sparx5_dcbnl_ops = { .ieee_setapp = sparx5_dcb_ieee_setapp, .ieee_delapp = sparx5_dcb_ieee_delapp, + .dcbnl_setapptrust = sparx5_dcb_setapptrust, + .dcbnl_getapptrust = sparx5_dcb_getapptrust, }; diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_port.c b/drivers/net/ethernet/microchip/sparx5/sparx5_port.c index 9ffaaf34d196..99e86e87aa16 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_port.c +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_port.c @@ -1163,8 +1163,8 @@ int sparx5_port_qos_pcp_set(const struct sparx5_port *port, int i; /* Enable/disable pcp and dp for qos classification. */ - spx5_rmw(ANA_CL_QOS_CFG_PCP_DEI_QOS_ENA_SET(1) | - ANA_CL_QOS_CFG_PCP_DEI_DP_ENA_SET(1), + spx5_rmw(ANA_CL_QOS_CFG_PCP_DEI_QOS_ENA_SET(qos->qos_enable) | + ANA_CL_QOS_CFG_PCP_DEI_DP_ENA_SET(qos->dp_enable), ANA_CL_QOS_CFG_PCP_DEI_QOS_ENA | ANA_CL_QOS_CFG_PCP_DEI_DP_ENA, sparx5, ANA_CL_QOS_CFG(port->portno)); diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_port.h b/drivers/net/ethernet/microchip/sparx5/sparx5_port.h index 9c5fb6b651db..fae9f5464548 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_port.h +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_port.h @@ -97,6 +97,8 @@ struct sparx5_port_qos_pcp_map { struct sparx5_port_qos_pcp { struct sparx5_port_qos_pcp_map map; + bool qos_enable; + bool dp_enable; }; struct sparx5_port_qos { diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_qos.c b/drivers/net/ethernet/microchip/sparx5/sparx5_qos.c index 1e79d0ef0cb8..379e540e5e6a 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_qos.c +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_qos.c @@ -389,6 +389,10 @@ int sparx5_qos_init(struct sparx5 *sparx5) if (ret < 0) return ret; + ret = sparx5_dcb_init(sparx5); + if (ret < 0) + return ret; + return 0; } diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_qos.h b/drivers/net/ethernet/microchip/sparx5/sparx5_qos.h index ced35033a6c5..6d248cbd485b 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_qos.h +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_qos.h @@ -61,6 +61,9 @@ struct sparx5_dwrr { int sparx5_qos_init(struct sparx5 *sparx5); +/* sparx5_dcb.c */ +int sparx5_dcb_init(struct sparx5 *sparx5); + /* Multi-Queue Priority */ int sparx5_tc_mqprio_add(struct net_device *ndev, u8 num_tc); int sparx5_tc_mqprio_del(struct net_device *ndev);