@@ -41,12 +41,6 @@
#define RCANFD_DRV_NAME "rcar_canfd"
-enum rcanfd_chip_id {
- RENESAS_RCAR_GEN3 = 0,
- RENESAS_RZG2L,
- RENESAS_R8A779A0,
-};
-
/* Global register bits */
/* RSCFDnCFDGRMCFG */
@@ -524,11 +518,11 @@ enum rcar_canfd_fcanclk {
struct rcar_canfd_global;
struct rcar_canfd_hw_info {
- enum rcanfd_chip_id chip_id;
unsigned int max_channels;
unsigned int postdiv;
/* hardware features */
unsigned shared_global_irqs:1; /* Has shared global irqs */
+ unsigned multi_channel_irqs:1; /* Has multiple channel irqs */
};
/* Channel priv data */
@@ -599,20 +593,18 @@ static const struct can_bittiming_const rcar_canfd_bittiming_const = {
};
static const struct rcar_canfd_hw_info rcar_gen3_hw_info = {
- .chip_id = RENESAS_RCAR_GEN3,
.max_channels = 2,
.postdiv = 2,
.shared_global_irqs = 1,
};
static const struct rcar_canfd_hw_info rzg2l_hw_info = {
- .chip_id = RENESAS_RZG2L,
- .postdiv = 1,
.max_channels = 2,
+ .postdiv = 1,
+ .multi_channel_irqs = 1,
};
static const struct rcar_canfd_hw_info r8a779a0_hw_info = {
- .chip_id = RENESAS_R8A779A0,
.max_channels = 8,
.postdiv = 2,
.shared_global_irqs = 1,
@@ -1751,7 +1743,7 @@ static int rcar_canfd_channel_probe(struct rcar_canfd_global *gpriv, u32 ch,
priv->can.clock.freq = fcan_freq;
dev_info(&pdev->dev, "can_clk rate is %u\n", priv->can.clock.freq);
- if (info->chip_id == RENESAS_RZG2L) {
+ if (info->multi_channel_irqs) {
char *irq_name;
int err_irq;
int tx_irq;