diff mbox series

[v2,17/19] ARM: dts: imx6ul: set enet_clk_ref to CLK_ENETx_REF_SEL

Message ID 20230117061453.3723649-18-o.rempel@pengutronix.de (mailing list archive)
State Not Applicable
Headers show
Series ARM: imx: make Ethernet refclock configurable | expand

Checks

Context Check Description
netdev/tree_selection success Not a local patch

Commit Message

Oleksij Rempel Jan. 17, 2023, 6:14 a.m. UTC 
IMX6UL_CLK_ENETx_REF is behind of CLK_ENETx_REF_SEL:

FEC MAC <---------- CLK_ENETx_REF_SEL <--------- CLK_ENETx_REF
		       \
		        ^------<-> CLK_ENETx_REF_PAD

We should point to the clock selector instead. So, we will be able to
use external clock source from CLK_ENETx_REF_PAD as well.

At same time, remove enet_out clk. It is using always the same clock as
enet_clk_ref and do not help to solve any challenges of this HW.

Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
---
 arch/arm/boot/dts/imx6ul.dtsi | 10 ++++------
 1 file changed, 4 insertions(+), 6 deletions(-)
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
index 2b5996395701..fa9afedb6549 100644
--- a/arch/arm/boot/dts/imx6ul.dtsi
+++ b/arch/arm/boot/dts/imx6ul.dtsi
@@ -532,10 +532,9 @@  fec2: ethernet@20b4000 {
 				clocks = <&clks IMX6UL_CLK_ENET>,
 					 <&clks IMX6UL_CLK_ENET_AHB>,
 					 <&clks IMX6UL_CLK_ENET_PTP>,
-					 <&clks IMX6UL_CLK_ENET2_REF_125M>,
-					 <&clks IMX6UL_CLK_ENET2_REF_125M>;
+					 <&clks IMX6UL_CLK_ENET2_REF_SEL>;
 				clock-names = "ipg", "ahb", "ptp",
-					      "enet_clk_ref", "enet_out";
+					      "enet_clk_ref";
 				fsl,num-tx-queues = <1>;
 				fsl,num-rx-queues = <1>;
 				fsl,stop-mode = <&gpr 0x10 4>;
@@ -880,10 +879,9 @@  fec1: ethernet@2188000 {
 				clocks = <&clks IMX6UL_CLK_ENET>,
 					 <&clks IMX6UL_CLK_ENET_AHB>,
 					 <&clks IMX6UL_CLK_ENET_PTP>,
-					 <&clks IMX6UL_CLK_ENET_REF>,
-					 <&clks IMX6UL_CLK_ENET_REF>;
+					 <&clks IMX6UL_CLK_ENET1_REF_SEL>;
 				clock-names = "ipg", "ahb", "ptp",
-					      "enet_clk_ref", "enet_out";
+					      "enet_clk_ref";
 				fsl,num-tx-queues = <1>;
 				fsl,num-rx-queues = <1>;
 				fsl,stop-mode = <&gpr 0x10 3>;