From patchwork Fri Jan 20 09:20:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oleksij Rempel X-Patchwork-Id: 13109484 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 29131C05027 for ; Fri, 20 Jan 2023 09:21:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230272AbjATJVn (ORCPT ); Fri, 20 Jan 2023 04:21:43 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37456 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230293AbjATJVf (ORCPT ); Fri, 20 Jan 2023 04:21:35 -0500 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 84F6E951B6 for ; Fri, 20 Jan 2023 01:21:11 -0800 (PST) Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1pIna3-0002yG-E4; Fri, 20 Jan 2023 10:21:03 +0100 Received: from [2a0a:edc0:0:1101:1d::ac] (helo=dude04.red.stw.pengutronix.de) by drehscheibe.grey.stw.pengutronix.de with esmtp (Exim 4.94.2) (envelope-from ) id 1pIna1-007L8x-Ld; Fri, 20 Jan 2023 10:21:01 +0100 Received: from ore by dude04.red.stw.pengutronix.de with local (Exim 4.94.2) (envelope-from ) id 1pIna0-001STr-V6; Fri, 20 Jan 2023 10:21:00 +0100 From: Oleksij Rempel To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Cc: Oleksij Rempel , kernel@pengutronix.de, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Arun.Ramadoss@microchip.com Subject: [PATCH net-next v2 2/4] net: phy: micrel: add EEE configuration support for KSZ9477 variants of PHYs Date: Fri, 20 Jan 2023 10:20:57 +0100 Message-Id: <20230120092059.347734-3-o.rempel@pengutronix.de> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230120092059.347734-1-o.rempel@pengutronix.de> References: <20230120092059.347734-1-o.rempel@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: ore@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: netdev@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org KSZ9477 variants of PHYs are not completely compatible with generic phy_ethtool_get/set_eee() handlers. For example MDIO_PCS_EEE_ABLE acts like a mirror of MDIO_AN_EEE_ADV register. If MDIO_AN_EEE_ADV set to 0, MDIO_PCS_EEE_ABLE will be 0 too. It means, if we do "ethtool --set-eee lan2 eee off", we won't be able to enable it again. With this patch, instead of reading MDIO_PCS_EEE_ABLE register, the driver will provide proper abilities. Signed-off-by: Oleksij Rempel --- drivers/net/phy/micrel.c | 81 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 81 insertions(+) diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c index d5b80c31ab91..dca61a73c144 100644 --- a/drivers/net/phy/micrel.c +++ b/drivers/net/phy/micrel.c @@ -1370,6 +1370,85 @@ static int ksz9131_config_aneg(struct phy_device *phydev) return genphy_config_aneg(phydev); } +static void ksz9477_get_eee_caps(struct phy_device *phydev, + struct ethtool_eee *data) +{ + /* At least on KSZ8563 (which has same PHY_ID as KSZ9477), the + * MDIO_PCS_EEE_ABLE register is a mirror of MDIO_AN_EEE_ADV register. + * So, we need to provide this information by driver. + */ + data->supported = SUPPORTED_100baseT_Full; + + /* KSZ8563 is able to advertise not supported MDIO_EEE_1000T. + * We need to test if the PHY is 1Gbit capable. + */ + if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, + phydev->supported)) + data->supported |= SUPPORTED_1000baseT_Full; +} + +static int ksz9477_get_eee(struct phy_device *phydev, struct ethtool_eee *data) +{ + int val; + + ksz9477_get_eee_caps(phydev, data); + + /* Get advertisement EEE */ + val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV); + if (val < 0) + return val; + data->advertised = mmd_eee_adv_to_ethtool_adv_t(val); + data->eee_enabled = !!data->advertised; + + /* Get LP advertisement EEE */ + val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE); + if (val < 0) + return val; + data->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(val); + + data->eee_active = !!(data->advertised & data->lp_advertised); + + return 0; +} + +static int ksz9477_set_eee(struct phy_device *phydev, struct ethtool_eee *data) +{ + int old_adv, adv = 0, ret; + + ksz9477_get_eee_caps(phydev, data); + + old_adv = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV); + if (old_adv < 0) + return old_adv; + + if (data->eee_enabled) { + if (!data->advertised) + adv = ethtool_adv_to_mmd_eee_adv_t(data->supported); + else + adv = ethtool_adv_to_mmd_eee_adv_t(data->advertised & + data->supported); + /* Mask prohibited EEE modes */ + adv &= ~phydev->eee_broken_modes; + } + + if (old_adv != adv) { + ret = phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV, adv); + if (ret < 0) + return ret; + + /* Restart autonegotiation so the new modes get sent to the + * link partner. + */ + if (phydev->autoneg == AUTONEG_ENABLE) { + ret = phy_restart_aneg(phydev); + if (ret < 0) + return ret; + } + } + + return 0; +} + #define KSZ8873MLL_GLOBAL_CONTROL_4 0x06 #define KSZ8873MLL_GLOBAL_CONTROL_4_DUPLEX BIT(6) #define KSZ8873MLL_GLOBAL_CONTROL_4_SPEED BIT(4) @@ -3422,6 +3501,8 @@ static struct phy_driver ksphy_driver[] = { .handle_interrupt = kszphy_handle_interrupt, .suspend = genphy_suspend, .resume = genphy_resume, + .get_eee = ksz9477_get_eee, + .set_eee = ksz9477_set_eee, } }; module_phy_driver(ksphy_driver);