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Miller" , Krzysztof Kozlowski , Rob Herring , Lee Jones Subject: [PATCH v5 net-next 13/13] mfd: ocelot: add external ocelot switch control Date: Fri, 27 Jan 2023 11:35:59 -0800 Message-Id: <20230127193559.1001051-14-colin.foster@in-advantage.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230127193559.1001051-1-colin.foster@in-advantage.com> References: <20230127193559.1001051-1-colin.foster@in-advantage.com> X-ClientProxiedBy: BYAPR02CA0011.namprd02.prod.outlook.com (2603:10b6:a02:ee::24) To DM5PR1001MB2345.namprd10.prod.outlook.com (2603:10b6:4:2d::31) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM5PR1001MB2345:EE_|SA2PR10MB4636:EE_ X-MS-Office365-Filtering-Correlation-Id: ccda9539-c093-41ef-b0da-08db009dcc04 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: h4JIcBEVGj+QmgK3RW7Q35FzUyLhlT+YpM+LOSo7veMYBeaApaOixIxCnRzGLddG45WiXlb7EprTNGTz1BYLWe3HN2YvnVL6POP03L+g0VeIPFHgHcVXO0dt0qytsLKyfQmNgY2Qdb+QUQZQlA37GLh9HkFOZNpWdx6HXNOE82PKr9bTssLE+ms/TslBHhbm9qO4YEcr//gcK4QKOyx+hEg5ADLBqnZgsrRarwFtC52g/UGegE2dDsf5QdNB4erPHQZTAgyWHC5DrC0443A90599dZYuwCcYvqnGnS6hKgdk90UpSiEisnQVV2QH643COP5GUg4LInQJ4vRtj3B6mw6ubxkyY23DChTjSspmz0p1ld0pTwHb+Yl0QRwaH42ZuDEzpLzB1UOrrTawXvnet2eEGJiqxIKbDJlkt1dlmMes+tJ1K5N3dGEY0uwRpyU9fTazoqD1YQEa5ATmYk7G1XVd0vlJiS95FLi/jFDYQQe1cR9Utja+gni753IULOcAneb4m1qaRjvE9R5zMq83QTg9ic8aArY3lX8/MMtnB0jZpm52Lxltz/Qsw6vbOv4+1o55qefBxlNsPXtipGRTw8rxk64U5wdbLlTVif3YsUB0LUhXZ9va32S4RB2Y4bw/GJaWQILzijc8pBG0JPKLT8UM8ij3bKOkOX9bjF8ifJsbxgcaFqJGSyeNrwZlDN7QbPDjkLlEid8BeEegndPD2w== X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:DM5PR1001MB2345.namprd10.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230025)(376002)(136003)(39840400004)(396003)(346002)(366004)(451199018)(36756003)(86362001)(2906002)(2616005)(6512007)(26005)(186003)(66946007)(66556008)(8676002)(4326008)(66476007)(52116002)(316002)(54906003)(6666004)(1076003)(6506007)(6486002)(478600001)(38350700002)(38100700002)(5660300002)(44832011)(41300700001)(7416002)(8936002);DIR:OUT;SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: ld4bWvPTNQGcBZR5rnzV8KJh7xinSZxXbV02IVYb3AybjpJwEGAKgTgwLz51gBE5H14unAmiIXIdLAOcmITGQZgmXLLnL5A44OFzxtHYBYx/THOIjxePbUoETYnZoyXaWe/90BYi4+Fspfvhqhj7H51653joEae7Ih2L75Zrhz9sdqyX0fCtJsNM9qd34a20CjP1ksJr5uIHZIMl+Gcw5UkUO0A6FfF8kSrdK2rr7MM65R9hhi7qG8YYm3pbYNyf+Q6p/XkXZqDv1U6hULyaOmch9YBY81iq9+okLGJSTNWRsvF7qQ72unIM0fmSdUDHWsug3Oxjxip5Y+aF7XXkQZjeSLNnJgvVbvfh9kt6sfnt7Th7O9PxVSmJ3iwg8LqUei8DjLyY8oa4FB2QEtZznAoKlAcaPgCpXGnorjkkrtmgSmqxMDRSLArvilP+pZ75IpCb/zAFjZ24dcR81OpNulF+RcAZyz3/26ucemt4hxFnJQJ+FBFhbvd6Gr150KTqKEiZzAUIkWmfx+Q29QllSQg9icjpVEp0m5WkRNkg5FQDrHo3SZ/Y5GsG17duQW6PN9K7p4M7PSBR8PcZYAGF2k+2lHavDl8E5cKQ30dzdV9t65APw+Sc9tyjnOMvnpi5T7zfw9KkODy2nDPlxzXkRuYraG5fT+20JEUSe3LX0vKU12KDL0xZWThe+HpI5msVhVmJEm251zJS9wkOx/A2Xy0ubP0buR+gUAvL3RL5Xjr4dui/9zls+xwlZ52+gbxhkrI+8bTeGsfRz5gPyll4F2g7cphVRedmlOF1eY7pRkrADYQT8Q5xbKeLGtUTRBXwLi0ZGLl34IswvvWzuXHNzrDHGssDCWCFIsFQR2dL1ZKmtodn1wqJj7KG7YneoeKB/vEYYYEswDrOWObjDnlugWIF4Z4RhdZDNKSn3DZBINOR35m72RYZxpuUO6yQOF2yKJZfKEDMMawDLvDE2ORB9IBmaMpUEVRtJaJXm0FaDWxnfZL4rerWbwnBFhS0vPCYAJnPIFKdSuiNzpSBs8IEotiZ60POMzvYBNcFlIUYChrC7veO91q/MoBCbyjstV1VRrnLqpA2EiT67t+d51nsizGU718ady/oerzkjBvifJ644QRypfTCgLvPCbgrcsiTFuVMhc+dJnOIqXwCqvwKxftwWItzCwE7ZlPH2a3u9SbbXEwoT48JM+VHQ5kx3bNehdkymbJ2tgRvLb13DMBW1GxqgrgOTKUOx9ww5VONexJJMJ0yoFD+uv0H1aKcUM1rVUv1lj77HAdMKW/9uT9tAtqF9ewOt9Yxkrzkw3NfFHybcsEkSIkK4aLilqKtS1orA/dLpgVKkor1L9PE6er3wYqhAd+U2R9FU5Jt4+rZKD6TNYhQWoR62EIGIYU7SikWNe78Wj8MKFfbhu1tmIpHMC6lXnOC0EM6XSS/2H+WVWgSqiIMj6LD9PEXOQNBjrNxfsNOCCaD+4n9rcbbdCm/Mhu3bitS+7disEAb2bGuZ35hikt5PZLPPIjQ+2hfov7o+0jZdSTZ6/+D/9NfEESPwvP3vxml7P+5sGhgtUD7x97bJXl7yDFY+CgD4HYmA9WOQvMZCsa1lxqD1KXFsOiDA7AtDAIEx1Uc8dtezuf7H+4= X-OriginatorOrg: in-advantage.com X-MS-Exchange-CrossTenant-Network-Message-Id: ccda9539-c093-41ef-b0da-08db009dcc04 X-MS-Exchange-CrossTenant-AuthSource: DM5PR1001MB2345.namprd10.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Jan 2023 19:36:33.7344 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 48e842ca-fbd8-4633-a79d-0c955a7d3aae X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 9HfBQfpzu4BlakstwQMluHRcKXXbyCMFLJ0CL7N5Sxuj9lOACBhxdR4BPvbsUSj01HxN0IP9GMhLRRzK++kziGOL63oGbJFpXCI5V8hHBtw= X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA2PR10MB4636 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Utilize the existing ocelot MFD interface to add switch functionality to the Microsemi VSC7512 chip. Signed-off-by: Colin Foster Acked-for-MFD-by: Lee Jones Reviewed-by: Florian Fainelli --- v5 * Add Acked-for-MFD Lee tag * Remove OCELOT_REG_NAME_ macros v4 * Integrate a different patch, so now this one - Adds the resources during this patch. Previouisly this was done in a separate patch - Utilize the standard {,num_}resources initializer v3 * No change v2 * New patch, broken out from a previous one --- drivers/mfd/ocelot-core.c | 60 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 60 insertions(+) diff --git a/drivers/mfd/ocelot-core.c b/drivers/mfd/ocelot-core.c index 013e83173062..b0ff05c1759f 100644 --- a/drivers/mfd/ocelot-core.c +++ b/drivers/mfd/ocelot-core.c @@ -45,6 +45,39 @@ #define VSC7512_SIO_CTRL_RES_START 0x710700f8 #define VSC7512_SIO_CTRL_RES_SIZE 0x00000100 +#define VSC7512_ANA_RES_START 0x71880000 +#define VSC7512_ANA_RES_SIZE 0x00010000 + +#define VSC7512_QS_RES_START 0x71080000 +#define VSC7512_QS_RES_SIZE 0x00000100 + +#define VSC7512_QSYS_RES_START 0x71800000 +#define VSC7512_QSYS_RES_SIZE 0x00200000 + +#define VSC7512_REW_RES_START 0x71030000 +#define VSC7512_REW_RES_SIZE 0x00010000 + +#define VSC7512_SYS_RES_START 0x71010000 +#define VSC7512_SYS_RES_SIZE 0x00010000 + +#define VSC7512_S0_RES_START 0x71040000 +#define VSC7512_S1_RES_START 0x71050000 +#define VSC7512_S2_RES_START 0x71060000 +#define VCAP_RES_SIZE 0x00000400 + +#define VSC7512_PORT_0_RES_START 0x711e0000 +#define VSC7512_PORT_1_RES_START 0x711f0000 +#define VSC7512_PORT_2_RES_START 0x71200000 +#define VSC7512_PORT_3_RES_START 0x71210000 +#define VSC7512_PORT_4_RES_START 0x71220000 +#define VSC7512_PORT_5_RES_START 0x71230000 +#define VSC7512_PORT_6_RES_START 0x71240000 +#define VSC7512_PORT_7_RES_START 0x71250000 +#define VSC7512_PORT_8_RES_START 0x71260000 +#define VSC7512_PORT_9_RES_START 0x71270000 +#define VSC7512_PORT_10_RES_START 0x71280000 +#define VSC7512_PORT_RES_SIZE 0x00010000 + #define VSC7512_GCB_RST_SLEEP_US 100 #define VSC7512_GCB_RST_TIMEOUT_US 100000 @@ -96,6 +129,28 @@ static const struct resource vsc7512_sgpio_resources[] = { DEFINE_RES_REG_NAMED(VSC7512_SIO_CTRL_RES_START, VSC7512_SIO_CTRL_RES_SIZE, "gcb_sio"), }; +static const struct resource vsc7512_switch_resources[] = { + DEFINE_RES_REG_NAMED(VSC7512_ANA_RES_START, VSC7512_ANA_RES_SIZE, "ana"), + DEFINE_RES_REG_NAMED(VSC7512_QS_RES_START, VSC7512_QS_RES_SIZE, "qs"), + DEFINE_RES_REG_NAMED(VSC7512_QSYS_RES_START, VSC7512_QSYS_RES_SIZE, "qsys"), + DEFINE_RES_REG_NAMED(VSC7512_REW_RES_START, VSC7512_REW_RES_SIZE, "rew"), + DEFINE_RES_REG_NAMED(VSC7512_SYS_RES_START, VSC7512_SYS_RES_SIZE, "sys"), + DEFINE_RES_REG_NAMED(VSC7512_S0_RES_START, VCAP_RES_SIZE, "s0"), + DEFINE_RES_REG_NAMED(VSC7512_S1_RES_START, VCAP_RES_SIZE, "s1"), + DEFINE_RES_REG_NAMED(VSC7512_S2_RES_START, VCAP_RES_SIZE, "s2"), + DEFINE_RES_REG_NAMED(VSC7512_PORT_0_RES_START, VSC7512_PORT_RES_SIZE, "port0"), + DEFINE_RES_REG_NAMED(VSC7512_PORT_1_RES_START, VSC7512_PORT_RES_SIZE, "port1"), + DEFINE_RES_REG_NAMED(VSC7512_PORT_2_RES_START, VSC7512_PORT_RES_SIZE, "port2"), + DEFINE_RES_REG_NAMED(VSC7512_PORT_3_RES_START, VSC7512_PORT_RES_SIZE, "port3"), + DEFINE_RES_REG_NAMED(VSC7512_PORT_4_RES_START, VSC7512_PORT_RES_SIZE, "port4"), + DEFINE_RES_REG_NAMED(VSC7512_PORT_5_RES_START, VSC7512_PORT_RES_SIZE, "port5"), + DEFINE_RES_REG_NAMED(VSC7512_PORT_6_RES_START, VSC7512_PORT_RES_SIZE, "port6"), + DEFINE_RES_REG_NAMED(VSC7512_PORT_7_RES_START, VSC7512_PORT_RES_SIZE, "port7"), + DEFINE_RES_REG_NAMED(VSC7512_PORT_8_RES_START, VSC7512_PORT_RES_SIZE, "port8"), + DEFINE_RES_REG_NAMED(VSC7512_PORT_9_RES_START, VSC7512_PORT_RES_SIZE, "port9"), + DEFINE_RES_REG_NAMED(VSC7512_PORT_10_RES_START, VSC7512_PORT_RES_SIZE, "port10") +}; + static const struct mfd_cell vsc7512_devs[] = { { .name = "ocelot-pinctrl", @@ -121,6 +176,11 @@ static const struct mfd_cell vsc7512_devs[] = { .use_of_reg = true, .num_resources = ARRAY_SIZE(vsc7512_miim1_resources), .resources = vsc7512_miim1_resources, + }, { + .name = "ocelot-switch", + .of_compatible = "mscc,vsc7512-switch", + .num_resources = ARRAY_SIZE(vsc7512_switch_resources), + .resources = vsc7512_switch_resources, }, };