From patchwork Sat Feb 11 03:18:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 13136832 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 13C8EC6379F for ; Sat, 11 Feb 2023 03:19:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229804AbjBKDT5 (ORCPT ); Fri, 10 Feb 2023 22:19:57 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36058 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229751AbjBKDTi (ORCPT ); Fri, 10 Feb 2023 22:19:38 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 19BBDBDD8; Fri, 10 Feb 2023 19:19:06 -0800 (PST) Received: from localhost (unknown [86.120.32.152]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by madras.collabora.co.uk (Postfix) with ESMTPSA id B15676602112; Sat, 11 Feb 2023 03:19:04 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1676085544; bh=giBLXfHgd+nXmXgHpm08kBXy7O346waFR5TnsQQNUJ0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=c4QNRDT72f7rGgDkbpsH5cio8u1cyWic15TpkDUfoubuBgE5U6mjkH2uwqQJsEuck /zvq5XfWc3sECoa1uHGMUfMgw5BxNfXqKQVL9+J0nimoYf58szUQrILkSxUDqvtW08 B2ovKjfoji0bZP+v2SsEywo2OiyB+wXv29mrqZVM2DBeRaC/YLhDUkP+F15oQPq5fh ch5CR2oIk/P8nfnsHGCF+yyvyg+j/E1hpz/o2U5lJkRK1Mkts/8dfttRgJ1kTqVGxL yZeCyn8WW4dI2kWbdLtXmggsRq7SKHm2GLZ0HacPogzx/P3o3jfS4w7S2JwSAe/fGz NwN72WtsW7yTw== From: Cristian Ciocaltea To: Lee Jones , Rob Herring , Krzysztof Kozlowski , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Emil Renner Berthing , Conor Dooley , Palmer Dabbelt , Paul Walmsley , Albert Ou , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , Maxime Coquelin , Richard Cochran , Sagar Kadam , Yanhong Wang Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-riscv@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, kernel@collabora.com Subject: [PATCH 11/12] riscv: dts: starfive: jh7100: Add sysmain and gmac DT nodes Date: Sat, 11 Feb 2023 05:18:20 +0200 Message-Id: <20230211031821.976408-12-cristian.ciocaltea@collabora.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230211031821.976408-1-cristian.ciocaltea@collabora.com> References: <20230211031821.976408-1-cristian.ciocaltea@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Provide the sysmain and gmac DT nodes supporting the DWMAC found on the StarFive JH7100 SoC. Signed-off-by: Cristian Ciocaltea --- arch/riscv/boot/dts/starfive/jh7100.dtsi | 38 ++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/arch/riscv/boot/dts/starfive/jh7100.dtsi b/arch/riscv/boot/dts/starfive/jh7100.dtsi index 88f91bc5753b..0918af7b6eb0 100644 --- a/arch/riscv/boot/dts/starfive/jh7100.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7100.dtsi @@ -164,6 +164,44 @@ rstgen: reset-controller@11840000 { #reset-cells = <1>; }; + sysmain: syscon@11850000 { + compatible = "starfive,jh7100-sysmain", "syscon"; + reg = <0x0 0x11850000 0x0 0x10000>; + }; + + gmac: ethernet@10020000 { + compatible = "starfive,jh7100-dwmac", "snps,dwmac"; + reg = <0x0 0x10020000 0x0 0x10000>; + clocks = <&clkgen JH7100_CLK_GMAC_ROOT_DIV>, + <&clkgen JH7100_CLK_GMAC_AHB>, + <&clkgen JH7100_CLK_GMAC_PTP_REF>, + <&clkgen JH7100_CLK_GMAC_GTX>, + <&clkgen JH7100_CLK_GMAC_TX_INV>; + clock-names = "stmmaceth", "pclk", "ptp_ref", "gtxc", "tx"; + resets = <&rstgen JH7100_RSTN_GMAC_AHB>; + reset-names = "ahb"; + interrupts = <6>, <7>; + interrupt-names = "macirq", "eth_wake_irq"; + max-frame-size = <9000>; + phy-mode = "rgmii-txid"; + snps,multicast-filter-bins = <32>; + snps,perfect-filter-entries = <128>; + starfive,syscon = <&sysmain>; + rx-fifo-depth = <32768>; + tx-fifo-depth = <16384>; + snps,axi-config = <&stmmac_axi_setup>; + snps,fixed-burst; + snps,force_thresh_dma_mode; + snps,no-pbl-x8; + status = "disabled"; + + stmmac_axi_setup: stmmac-axi-config { + snps,wr_osr_lmt = <0xf>; + snps,rd_osr_lmt = <0xf>; + snps,blen = <256 128 64 32 0 0 0>; + }; + }; + i2c0: i2c@118b0000 { compatible = "snps,designware-i2c"; reg = <0x0 0x118b0000 0x0 0x10000>;