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Wed, 8 Mar 2023 05:13:41 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by BN8NAM11FT110.mail.protection.outlook.com (10.13.176.156) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6178.17 via Frontend Transport; Wed, 8 Mar 2023 05:13:40 +0000 Received: from driver-dev1.pensando.io (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Tue, 7 Mar 2023 23:13:39 -0600 From: Shannon Nelson To: , , , , CC: , , Subject: [PATCH RFC v4 net-next 08/13] pds_core: add initial VF device handling Date: Tue, 7 Mar 2023 21:13:05 -0800 Message-ID: <20230308051310.12544-9-shannon.nelson@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230308051310.12544-1-shannon.nelson@amd.com> References: <20230308051310.12544-1-shannon.nelson@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT110:EE_|IA1PR12MB7493:EE_ X-MS-Office365-Filtering-Correlation-Id: e58371b6-51ea-4ea2-ab50-08db1f93e1a0 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Mar 2023 05:13:40.8645 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e58371b6-51ea-4ea2-ab50-08db1f93e1a0 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT110.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB7493 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC This is the initial VF PCI driver framework for the new pds_vdpa VF device, which will work in conjunction with an auxiliary_bus client of the pds_core driver. This does the very basics of registering for the new PCI device 1dd8:100b, setting up debugfs entries, and registering with devlink. Signed-off-by: Shannon Nelson --- drivers/net/ethernet/amd/pds_core/main.c | 45 +++++++++++++++++++++++- include/linux/pds/pds_core.h | 10 +++++- include/linux/pds/pds_core_if.h | 1 + 3 files changed, 54 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/amd/pds_core/main.c b/drivers/net/ethernet/amd/pds_core/main.c index 3cc8f693313a..db260fe149ff 100644 --- a/drivers/net/ethernet/amd/pds_core/main.c +++ b/drivers/net/ethernet/amd/pds_core/main.c @@ -21,6 +21,7 @@ MODULE_LICENSE("GPL"); /* Supported devices */ static const struct pci_device_id pdsc_id_table[] = { { PCI_VDEVICE(PENSANDO, PCI_DEVICE_ID_PENSANDO_CORE_PF) }, + { PCI_VDEVICE(PENSANDO, PCI_DEVICE_ID_PENSANDO_VDPA_VF) }, { 0, } /* end of table */ }; MODULE_DEVICE_TABLE(pci, pdsc_id_table); @@ -162,9 +163,48 @@ void __iomem *pdsc_map_dbpage(struct pdsc *pdsc, int page_num) (u64)page_num << PAGE_SHIFT, PAGE_SIZE); } +static int pdsc_sriov_configure(struct pci_dev *pdev, int num_vfs) +{ + struct pdsc *pdsc = pci_get_drvdata(pdev); + struct device *dev = pdsc->dev; + int ret = 0; + + if (num_vfs > 0) { + pdsc->vfs = kcalloc(num_vfs, sizeof(struct pdsc_vf), GFP_KERNEL); + if (!pdsc->vfs) + return -ENOMEM; + pdsc->num_vfs = num_vfs; + + ret = pci_enable_sriov(pdev, num_vfs); + if (ret) { + dev_err(dev, "Cannot enable SRIOV: %pe\n", ERR_PTR(ret)); + goto no_vfs; + } + + return num_vfs; + } + +no_vfs: + pci_disable_sriov(pdev); + + kfree(pdsc->vfs); + pdsc->vfs = NULL; + pdsc->num_vfs = 0; + + return ret; +} + static int pdsc_init_vf(struct pdsc *pdsc) { - return -1; + int err; + + pdsc->vf_id = pci_iov_vf_id(pdsc->pdev); + + err = pdsc_dl_register(pdsc); + if (err) + return err; + + return 0; } #define PDSC_WQ_NAME_LEN 24 @@ -316,6 +356,8 @@ static void pdsc_remove(struct pci_dev *pdev) pdsc_dl_unregister(pdsc); if (!pdev->is_virtfn) { + pdsc_sriov_configure(pdev, 0); + mutex_lock(&pdsc->config_lock); set_bit(PDSC_S_STOPPING_DRIVER, &pdsc->state); @@ -350,6 +392,7 @@ static struct pci_driver pdsc_driver = { .id_table = pdsc_id_table, .probe = pdsc_probe, .remove = pdsc_remove, + .sriov_configure = pdsc_sriov_configure, }; static int __init pdsc_init_module(void) diff --git a/include/linux/pds/pds_core.h b/include/linux/pds/pds_core.h index 274c899bbc55..7f59b3fbe451 100644 --- a/include/linux/pds/pds_core.h +++ b/include/linux/pds/pds_core.h @@ -30,6 +30,12 @@ struct pdsc_dev_bar { int res_index; }; +struct pdsc_vf { + struct pds_auxiliary_dev *padev; + u16 index; + __le16 vif_types[PDS_DEV_TYPE_MAX]; +}; + struct pdsc_devinfo { u8 asic_type; u8 asic_rev; @@ -147,6 +153,9 @@ struct pdsc { struct dentry *dentry; struct device *dev; struct pdsc_dev_bar bars[PDS_CORE_BARS_MAX]; + struct pdsc_vf *vfs; + int num_vfs; + int vf_id; int hw_index; int id; @@ -298,5 +307,4 @@ irqreturn_t pdsc_adminq_isr(int irq, void *data); int pdsc_firmware_update(struct pdsc *pdsc, const struct firmware *fw, struct netlink_ext_ack *extack); - #endif /* _PDSC_H_ */ diff --git a/include/linux/pds/pds_core_if.h b/include/linux/pds/pds_core_if.h index f780b58c785f..1caafcb8c3eb 100644 --- a/include/linux/pds/pds_core_if.h +++ b/include/linux/pds/pds_core_if.h @@ -8,6 +8,7 @@ #define PCI_VENDOR_ID_PENSANDO 0x1dd8 #define PCI_DEVICE_ID_PENSANDO_CORE_PF 0x100c +#define PCI_DEVICE_ID_PENSANDO_VDPA_VF 0x100b #define PDS_CORE_BARS_MAX 4 #define PDS_CORE_PCI_BAR_DBELL 1