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Sat, 11 Mar 2023 07:10:28 +0000 Date: Sat, 11 Mar 2023 08:10:24 +0100 From: Sven Auhagen To: netdev@vger.kernel.org Cc: mw@semihalf.com, linux@armlinux.org.uk, kuba@kernel.org, davem@davemloft.net, maxime.chevallier@bootlin.com Subject: [PATCH 3/3] net: mvpp2: parser fix PPPoE Message-ID: <20230311071024.irbtnpzvihm37hna@Svens-MacBookPro.local> Content-Disposition: inline X-ClientProxiedBy: FR0P281CA0051.DEUP281.PROD.OUTLOOK.COM (2603:10a6:d10:48::12) To AM9PR05MB8857.eurprd05.prod.outlook.com (2603:10a6:20b:438::20) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM9PR05MB8857:EE_|PAXPR05MB9410:EE_ X-MS-Office365-Filtering-Correlation-Id: 9d3df1d8-8ded-44bc-68d2-08db21ffb185 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: IxOqE/Mhu8TINmR1QEIf9oN67PeONY5Uas0dF2clEpoww3vHbLJ4Eo6dmHqZx9qQnqN+B6l6tLZEv9/XeLUxKnyVGDwAZag3eZzKzmHX+atG9zrT+vPjvCzhbMKDJlXhYfgKJr7GckMERkk4DoH5FAhP0CzoOCvFkHVRZCDEBDTUeENt3mpijWDCukDO0Cr5MyxDwhkRXfLfV+OzmjDaiS+QEU3rkt/FmdS+IpXXE6vR2ENWArYp/k3LEBbiGdMVgKx8KCiS3x5wS4AQDvnnUuGHYKIJGAGSff9uaozB3tZt8PWrAKF5mABJ0hnS8OyPkh+0P8EFdNBnJg67E3MMCOFzWr8w9N9t/ehUj7g7CZ3QsGJXt+Zqb5KPF5d5ZAkhvH3eILUelnanRbsG/HwFbsPLiwLo7/hIW6dC6VmybbTmWFtpeb2pQxg3hOvkO4bn7o45FO0VM/bi1UxbESVYo/vIrenn+R0bHf/W/UmLRydLUiqk7dvvbglaVVg4QDCZp4Qon0McUDuo43jvbHZ6b3k2tl3a1w5QyzwqpR+57njDgRdyXYG5hvZcS1joVugAXWVQLQJ9Fz2o0+thTos6md4a3crgSQDMRot6UL2kJLo6CdkM68l8JCobj5HLpcbfwaffKgUM1v1pft/krBvN6g== X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:AM9PR05MB8857.eurprd05.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230025)(4636009)(396003)(366004)(39840400004)(136003)(376002)(346002)(451199018)(86362001)(38100700002)(2906002)(41300700001)(8936002)(5660300002)(6512007)(6506007)(1076003)(9686003)(186003)(26005)(83380400001)(6666004)(316002)(66946007)(66556008)(66476007)(8676002)(6916009)(6486002)(478600001)(4326008);DIR:OUT;SFP:1102; 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Currently the L4 match does not work with PPPoE and all packets are matched as L3 IP4 OPT. Signed-off-by: Sven Auhagen diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c b/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c index ed8be396428b..9af22f497a40 100644 --- a/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c +++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c @@ -1607,59 +1607,45 @@ static int mvpp2_prs_vlan_init(struct platform_device *pdev, struct mvpp2 *priv) static int mvpp2_prs_pppoe_init(struct mvpp2 *priv) { struct mvpp2_prs_entry pe; - int tid; - - /* IPv4 over PPPoE with options */ - tid = mvpp2_prs_tcam_first_free(priv, MVPP2_PE_FIRST_FREE_TID, - MVPP2_PE_LAST_FREE_TID); - if (tid < 0) - return tid; - - memset(&pe, 0, sizeof(pe)); - mvpp2_prs_tcam_lu_set(&pe, MVPP2_PRS_LU_PPPOE); - pe.index = tid; - - mvpp2_prs_match_etype(&pe, 0, PPP_IP); - - mvpp2_prs_sram_next_lu_set(&pe, MVPP2_PRS_LU_IP4); - mvpp2_prs_sram_ri_update(&pe, MVPP2_PRS_RI_L3_IP4_OPT, - MVPP2_PRS_RI_L3_PROTO_MASK); - /* goto ipv4 dest-address (skip eth_type + IP-header-size - 4) */ - mvpp2_prs_sram_shift_set(&pe, MVPP2_ETH_TYPE_LEN + - sizeof(struct iphdr) - 4, - MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD); - /* Set L3 offset */ - mvpp2_prs_sram_offset_set(&pe, MVPP2_PRS_SRAM_UDF_TYPE_L3, - MVPP2_ETH_TYPE_LEN, - MVPP2_PRS_SRAM_OP_SEL_UDF_ADD); - - /* Update shadow table and hw entry */ - mvpp2_prs_shadow_set(priv, pe.index, MVPP2_PRS_LU_PPPOE); - mvpp2_prs_hw_write(priv, &pe); + int tid, ihl; - /* IPv4 over PPPoE without options */ - tid = mvpp2_prs_tcam_first_free(priv, MVPP2_PE_FIRST_FREE_TID, - MVPP2_PE_LAST_FREE_TID); - if (tid < 0) - return tid; + /* IPv4 over PPPoE with header length >= 5 */ + for (ihl = MVPP2_PRS_IPV4_IHL_MIN; ihl <= MVPP2_PRS_IPV4_IHL_MAX; ihl++) { + tid = mvpp2_prs_tcam_first_free(priv, MVPP2_PE_FIRST_FREE_TID, + MVPP2_PE_LAST_FREE_TID); + if (tid < 0) + return tid; - pe.index = tid; + memset(&pe, 0, sizeof(pe)); + mvpp2_prs_tcam_lu_set(&pe, MVPP2_PRS_LU_PPPOE); + pe.index = tid; - mvpp2_prs_tcam_data_byte_set(&pe, MVPP2_ETH_TYPE_LEN, - MVPP2_PRS_IPV4_HEAD | - MVPP2_PRS_IPV4_IHL_MIN, - MVPP2_PRS_IPV4_HEAD_MASK | - MVPP2_PRS_IPV4_IHL_MASK); + mvpp2_prs_match_etype(&pe, 0, PPP_IP); + mvpp2_prs_tcam_data_byte_set(&pe, MVPP2_ETH_TYPE_LEN, + MVPP2_PRS_IPV4_HEAD | ihl, + MVPP2_PRS_IPV4_HEAD_MASK | + MVPP2_PRS_IPV4_IHL_MASK); - /* Clear ri before updating */ - pe.sram[MVPP2_PRS_SRAM_RI_WORD] = 0x0; - pe.sram[MVPP2_PRS_SRAM_RI_CTRL_WORD] = 0x0; - mvpp2_prs_sram_ri_update(&pe, MVPP2_PRS_RI_L3_IP4, - MVPP2_PRS_RI_L3_PROTO_MASK); + mvpp2_prs_sram_next_lu_set(&pe, MVPP2_PRS_LU_IP4); + mvpp2_prs_sram_ri_update(&pe, MVPP2_PRS_RI_L3_IP4, + MVPP2_PRS_RI_L3_PROTO_MASK); + /* goto ipv4 dst-address (skip eth_type + IP-header-size - 4) */ + mvpp2_prs_sram_shift_set(&pe, MVPP2_ETH_TYPE_LEN + + sizeof(struct iphdr) - 4, + MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD); + /* Set L3 offset */ + mvpp2_prs_sram_offset_set(&pe, MVPP2_PRS_SRAM_UDF_TYPE_L3, + MVPP2_ETH_TYPE_LEN, + MVPP2_PRS_SRAM_OP_SEL_UDF_ADD); + /* Set L4 offset */ + mvpp2_prs_sram_offset_set(&pe, MVPP2_PRS_SRAM_UDF_TYPE_L4, + MVPP2_ETH_TYPE_LEN + (ihl * 4), + MVPP2_PRS_SRAM_OP_SEL_UDF_ADD); - /* Update shadow table and hw entry */ - mvpp2_prs_shadow_set(priv, pe.index, MVPP2_PRS_LU_PPPOE); - mvpp2_prs_hw_write(priv, &pe); + /* Update shadow table and hw entry */ + mvpp2_prs_shadow_set(priv, pe.index, MVPP2_PRS_LU_PPPOE); + mvpp2_prs_hw_write(priv, &pe); + } /* IPv6 over PPPoE */ tid = mvpp2_prs_tcam_first_free(priv, MVPP2_PE_FIRST_FREE_TID,