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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Balakrishna Godavarthi , Rocky Liao , Marcel Holtmann , Johan Hedberg , Luiz Augusto von Dentz , Andy Gross , Bjorn Andersson , Konrad Dybcio Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-bluetooth@vger.kernel.org, linux-arm-msm@vger.kernel.org, Neil Armstrong X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1815; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=jaEK1SW0U7tuAtTapDJNwvxMKnI1nWuMsJihPmoQlrc=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBkmprB7csm8NK59FIRf37oWsYMsFzp8vr3jW15ZUbT 5t8cumCJAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCZJqawQAKCRB33NvayMhJ0R/LD/ wIHevPwfj1Ukpd5iMRwuoLG9MKWLcB6AXx/pQfrRYvossKg41fiiLcDXztNq3ZxiQ3ijdK9VJEkZNb 4D49dHXO4gowVFYSGSyKulhhazUrXo58CBS9jqiziNEQ+JhAWWHHJb3t7+OnsBaCgdUrc+XyskIzeF 3yeEtn+OOFbEjg9b8svDP1Yjchf1iEbLBCG2T4CFVrlreQUxy0ixocoe2et5yxACvF0MrDaEwbCJOj 7L1mQ7G+fcEQdtvoGEAOtmy+Q7b78NFkLm6nENio+QUHyxQ84C1vhG3puMsI8Uoz8Z0J3a1fGje6Eq +MiuU46+kUlRGGTsYnZqKJ5hEzzNHeo7liHsfmDrCeuY5WTzkt/7ZHhDRvQ5PddhStTbnl5cIg2l+v 1DK5x68AYWpFnK4KVeYxcYY0HBL61K7deBFrkn6nD6CgcCOPOaRoRqr67Klj2YIlaCJkIxkKX1vjXx 7oq3GWcLPIHtTPXSKVDJqZNdKBmYZTgUdc6ftR1UgSGgGSi0OTIJmi1Kb97doJG0Wu1S4B9e9jDdx9 rU4FFpKpGy0BeTlygCjJxHIyuYmHdGswSmW/j0rLAyEFDzwXzd6AIt2E0UwB83tISn/zVfYPXowdx8 Tth0KwGuEIHB68XYPaDBohR6bD3dcMw29pNhYMOShyH7HdUb0sdSnBLpDaXQ== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Add the Geni High Speed UART QUP instance 2 element 6 node and associated default pinctrl. Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/qcom/sm8550.dtsi | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi index 75cd374943eb..252e3863322c 100644 --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi @@ -1053,6 +1053,20 @@ spi13: spi@894000 { status = "disabled"; }; + uart14: uart@898000 { + compatible = "qcom,geni-uart"; + reg = <0 0x898000 0 0x4000>; + clock-names = "se"; + clocks = <&gcc GCC_QUPV3_WRAP2_S6_CLK>; + pinctrl-names = "default"; + pinctrl-0 = <&qup_uart14_default>, <&qup_uart14_cts_rts>; + interrupts = ; + interconnects = <&clk_virt MASTER_QUP_CORE_2 0 &clk_virt SLAVE_QUP_CORE_2 0>, + <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_2 0>; + interconnect-names = "qup-core", "qup-config"; + status = "disabled"; + }; + i2c15: i2c@89c000 { compatible = "qcom,geni-i2c"; reg = <0 0x0089c000 0 0x4000>; @@ -3382,6 +3396,22 @@ qup_uart7_default: qup-uart7-default-state { bias-disable; }; + qup_uart14_default: qup-uart14-default-state { + /* TX, RX */ + pins = "gpio78", "gpio79"; + function = "qup2_se6"; + drive-strength = <2>; + bias-pull-up; + }; + + qup_uart14_cts_rts: qup-uart14-cts-rts-state { + /* CTS, RTS */ + pins = "gpio76", "gpio77"; + function = "qup2_se6"; + drive-strength = <2>; + bias-pull-down; + }; + sdc2_sleep: sdc2-sleep-state { clk-pins { pins = "sdc2_clk";