| Message ID | 20230716091621.27844-1-gakula@marvell.com (mailing list archive) |
|---|---|
| State | Changes Requested |
| Delegated to: | Netdev Maintainers |
| Headers | show |
| Series | [net] octeontx2-af: Adjust Tx credits when MCS external bypass is disabled | expand |
On Sun, 2023-07-16 at 14:46 +0530, Geetha sowjanya wrote: > From: Nithin Dabilpuram <ndabilpuram@marvell.com> > > When MCS external bypass is disabled, MCS returns additional > 2 credits(32B) for every packet Tx'ed on LMAC. To account for > these extra credits, NIX_AF_TX_LINKX_NORM_CREDIT.CC_MCS_CNT > needs to be configured as otherwise NIX Tx credits would overflow > and will never be returned to idle state credit count > causing issues with credit control and MTU change. > > This patch fixes the same by configuring CC_MCS_CNT at probe > time for MCS enabled SoC's > > Fixes: bd69476e86fc ("octeontx2-af: cn10k: mcs: Install a default TCAM for normal traffic") > Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com> > Signed-off-by: Geetha sowjanya <gakula@marvell.com> > Signed-off-by: Sunil Goutham <sgoutham@marvell.com> > --- > drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 2 +- > drivers/net/ethernet/marvell/octeontx2/af/mcs.c | 12 ++++++++++++ > drivers/net/ethernet/marvell/octeontx2/af/mcs.h | 2 ++ > drivers/net/ethernet/marvell/octeontx2/af/rvu.h | 1 + > drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c | 8 ++++++++ > 5 files changed, 24 insertions(+), 1 deletion(-) > > diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h > index eba307eee2b2..d78d72c0ca18 100644 > --- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h > +++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h > @@ -1914,7 +1914,7 @@ struct mcs_hw_info { > u8 tcam_entries; /* RX/TX Tcam entries per mcs block */ > u8 secy_entries; /* RX/TX SECY entries per mcs block */ > u8 sc_entries; /* RX/TX SC CAM entries per mcs block */ > - u8 sa_entries; /* PN table entries = SA entries */ > + u16 sa_entries; /* PN table entries = SA entries */ This chunk looks like an unrelated bug-fix. Please move it to a separate patch or mention in the commit message why it's needed here. Thanks! Paolo
> -----Original Message----- > From: Paolo Abeni <pabeni@redhat.com> > Sent: Tuesday, July 18, 2023 4:39 PM > To: Geethasowjanya Akula <gakula@marvell.com>; netdev@vger.kernel.org; > linux-kernel@vger.kernel.org > Cc: kuba@kernel.org; davem@davemloft.net; edumazet@google.com; Sunil > Kovvuri Goutham <sgoutham@marvell.com>; Subbaraya Sundeep Bhatta > <sbhatta@marvell.com>; Hariprasad Kelam <hkelam@marvell.com>; Nithin > Kumar Dabilpuram <ndabilpuram@marvell.com> > Subject: [EXT] Re: [net PATCH] octeontx2-af: Adjust Tx credits when MCS > external bypass is disabled > > External Email > > ---------------------------------------------------------------------- > On Sun, 2023-07-16 at 14:46 +0530, Geetha sowjanya wrote: > > From: Nithin Dabilpuram <ndabilpuram@marvell.com> > > > > When MCS external bypass is disabled, MCS returns additional > > 2 credits(32B) for every packet Tx'ed on LMAC. To account for these > > extra credits, NIX_AF_TX_LINKX_NORM_CREDIT.CC_MCS_CNT > > needs to be configured as otherwise NIX Tx credits would overflow and > > will never be returned to idle state credit count causing issues with > > credit control and MTU change. > > > > This patch fixes the same by configuring CC_MCS_CNT at probe time for > > MCS enabled SoC's > > > > Fixes: bd69476e86fc ("octeontx2-af: cn10k: mcs: Install a default TCAM > > for normal traffic") > > Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com> > > Signed-off-by: Geetha sowjanya <gakula@marvell.com> > > Signed-off-by: Sunil Goutham <sgoutham@marvell.com> > > --- > > drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 2 +- > > drivers/net/ethernet/marvell/octeontx2/af/mcs.c | 12 ++++++++++++ > > drivers/net/ethernet/marvell/octeontx2/af/mcs.h | 2 ++ > > drivers/net/ethernet/marvell/octeontx2/af/rvu.h | 1 + > > drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c | 8 ++++++++ > > 5 files changed, 24 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h > > b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h > > index eba307eee2b2..d78d72c0ca18 100644 > > --- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h > > +++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h > > @@ -1914,7 +1914,7 @@ struct mcs_hw_info { > > u8 tcam_entries; /* RX/TX Tcam entries per mcs block */ > > u8 secy_entries; /* RX/TX SECY entries per mcs block */ > > u8 sc_entries; /* RX/TX SC CAM entries per mcs block */ > > - u8 sa_entries; /* PN table entries = SA entries */ > > + u16 sa_entries; /* PN table entries = SA entries */ > > This chunk looks like an unrelated bug-fix. Please move it to a separate patch > or mention in the commit message why it's needed here. Will submit v2 with updated commit messages. Thanks, Geetha. > > Thanks! > > Paolo
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h index eba307eee2b2..d78d72c0ca18 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h +++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h @@ -1914,7 +1914,7 @@ struct mcs_hw_info { u8 tcam_entries; /* RX/TX Tcam entries per mcs block */ u8 secy_entries; /* RX/TX SECY entries per mcs block */ u8 sc_entries; /* RX/TX SC CAM entries per mcs block */ - u8 sa_entries; /* PN table entries = SA entries */ + u16 sa_entries; /* PN table entries = SA entries */ u64 rsvd[16]; }; diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mcs.c b/drivers/net/ethernet/marvell/octeontx2/af/mcs.c index c43f19dfbd74..d6effbe46208 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/mcs.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/mcs.c @@ -1219,6 +1219,17 @@ struct mcs *mcs_get_pdata(int mcs_id) return NULL; } +bool is_mcs_bypass(int mcs_id) +{ + struct mcs *mcs_dev; + + list_for_each_entry(mcs_dev, &mcs_list, mcs_list) { + if (mcs_dev->mcs_id == mcs_id) + return mcs_dev->bypass; + } + return true; +} + void mcs_set_port_cfg(struct mcs *mcs, struct mcs_port_cfg_set_req *req) { u64 val = 0; @@ -1447,6 +1458,7 @@ static void mcs_set_external_bypass(struct mcs *mcs, u8 bypass) else val &= ~BIT_ULL(6); mcs_reg_write(mcs, MCSX_MIL_GLOBAL, val); + mcs->bypass = bypass; } static void mcs_global_cfg(struct mcs *mcs) diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mcs.h b/drivers/net/ethernet/marvell/octeontx2/af/mcs.h index 0f89dcb76465..ccd43c3f3460 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/mcs.h +++ b/drivers/net/ethernet/marvell/octeontx2/af/mcs.h @@ -149,6 +149,7 @@ struct mcs { u16 num_vec; void *rvu; u16 *tx_sa_active; + u8 bypass; }; struct mcs_ops { @@ -206,6 +207,7 @@ void mcs_get_custom_tag_cfg(struct mcs *mcs, struct mcs_custom_tag_cfg_get_req * int mcs_alloc_ctrlpktrule(struct rsrc_bmap *rsrc, u16 *pf_map, u16 offset, u16 pcifunc); int mcs_free_ctrlpktrule(struct mcs *mcs, struct mcs_free_ctrl_pkt_rule_req *req); int mcs_ctrlpktrule_write(struct mcs *mcs, struct mcs_ctrl_pkt_rule_write_req *req); +bool is_mcs_bypass(int mcs_id); /* CN10K-B APIs */ void cn10kb_mcs_set_hw_capabilities(struct mcs *mcs); diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h index e8e65fd7888d..1efa77a368ee 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h @@ -343,6 +343,7 @@ struct nix_hw { struct nix_txvlan txvlan; struct nix_ipolicer *ipolicer; u64 *tx_credits; + u64 cc_mcs_cnt; }; /* RVU block's capabilities or functionality, diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c index 04b0e885f9d2..63d6b6dbd8e6 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c @@ -12,6 +12,7 @@ #include "rvu_reg.h" #include "rvu.h" #include "npc.h" +#include "mcs.h" #include "cgx.h" #include "lmac_common.h" #include "rvu_npc_hash.h" @@ -4371,6 +4372,12 @@ static void nix_link_config(struct rvu *rvu, int blkaddr, SDP_HW_MAX_FRS << 16 | NIC_HW_MIN_FRS); } + /* Get MCS external bypass status for CN10K-B */ + if (mcs_get_blkcnt() == 1) { + /* Adjust for 2 credits when external bypass is disabled */ + nix_hw->cc_mcs_cnt = is_mcs_bypass(0) ? 0 : 2; + } + /* Set credits for Tx links assuming max packet length allowed. * This will be reconfigured based on MTU set for PF/VF. */ @@ -4394,6 +4401,7 @@ static void nix_link_config(struct rvu *rvu, int blkaddr, tx_credits = (lmac_fifo_len - lmac_max_frs) / 16; /* Enable credits and set credit pkt count to max allowed */ cfg = (tx_credits << 12) | (0x1FF << 2) | BIT_ULL(1); + cfg |= (nix_hw->cc_mcs_cnt << 32); link = iter + slink; nix_hw->tx_credits[link] = tx_credits;