From patchwork Wed Aug 9 16:50:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jisheng Zhang X-Patchwork-Id: 13348211 X-Patchwork-Delegate: kuba@kernel.org Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 17B691BB4A for ; Wed, 9 Aug 2023 17:02:01 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5F458C433CD; Wed, 9 Aug 2023 17:01:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1691600520; bh=DE4uo4JK2isjtFObJJyFLlrT5b6CK5kuMo4uw+Jhg2c=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=JFN6RYl+M59YpWe19hAChu5SWzQB35nUp6hDH8BPSvUnpKx+NF67xEXL973v0+iFA TGP89k4RRXhABdvN2W/azWDTKPMFI8EdXLVK3dM9dpW0tPGHNrrZ9+/JZlbAR4G2Jo ZeZ1O0hxTM4wpzr04uaJaAj1HVdeeVB9UOjW6P6a9aSf72SMMtlE63TtxQLvwdvrg6 FMQSzTEIbp4Aygb5LqkP5LD6HB/89fr7vnxDbBzniKXx9RmhvU31Y0QcQ2jF9m2DgG h7S5q3X4/qYytyNUkhxXsgc/CtiJziehwwDwnqjTeXW28QF7JDPGLuFT3wIIG7O+pS YcsQZk9Y4C4yA== From: Jisheng Zhang To: "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org Subject: [PATCH net-next v3 04/10] net: stmmac: enlarge max rx/tx queues and channels to 16 Date: Thu, 10 Aug 2023 00:50:01 +0800 Message-Id: <20230809165007.1439-5-jszhang@kernel.org> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230809165007.1439-1-jszhang@kernel.org> References: <20230809165007.1439-1-jszhang@kernel.org> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org xgmac supports up to 16 rx/tx queues and up to 16 channels. Signed-off-by: Jisheng Zhang Acked-by: Alexandre TORGUE --- drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c | 5 ++--- include/linux/stmmac.h | 6 +++--- 2 files changed, 5 insertions(+), 6 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c index a0c2ef8bb0ac..aaae82d3d9dc 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c @@ -202,9 +202,8 @@ static void dwxgmac2_map_mtl_to_dma(struct mac_device_info *hw, u32 queue, void __iomem *ioaddr = hw->pcsr; u32 value, reg; - reg = (queue < 4) ? XGMAC_MTL_RXQ_DMA_MAP0 : XGMAC_MTL_RXQ_DMA_MAP1; - if (queue >= 4) - queue -= 4; + reg = XGMAC_MTL_RXQ_DMA_MAP0 + (queue & ~0x3); + queue &= 0x3; value = readl(ioaddr + reg); value &= ~XGMAC_QxMDMACH(queue); diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h index ef67dba775d0..11671fd6adee 100644 --- a/include/linux/stmmac.h +++ b/include/linux/stmmac.h @@ -15,9 +15,9 @@ #include #include -#define MTL_MAX_RX_QUEUES 8 -#define MTL_MAX_TX_QUEUES 8 -#define STMMAC_CH_MAX 8 +#define MTL_MAX_RX_QUEUES 16 +#define MTL_MAX_TX_QUEUES 16 +#define STMMAC_CH_MAX 16 #define STMMAC_RX_COE_NONE 0 #define STMMAC_RX_COE_TYPE1 1