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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 3KTWhQ5JdMIWIrXdUYfy7vMPWVy1GcT47YNyvD0BZRrqVAZYq3UQa8RR7JdO39j7kh31Ipq8PKVd0l1Ob18PJGrZqiRJwkmtmvzRJ1DbekLae5OF5Tra28iX1hRnW5l1TvAPa4Ely5nnKOrwc0+ATs/4DfM6bAwmm6IFzwYA+QtlAi1jva9APB34qmKcRFtCao+dAWmi+C2A2T+yAp4BuyWYoT7m435oZQguwAhuKbTH/htxytWhry/Ra3gmG0Bkd8UC2qIiBEXTZGU5Y9HWHyzyHPxIcb/z8+OEUvA7c2BCwjmfgBawRjMtS6RUnonuwKrbS8U2/Bfrto6jrtuzcI0iDpO8qNAjFKRhxkBKGDoVuJzOjMQadUQxr+fkGcAoIvNI9qYinP1Bt6TFhXV0AlCbVmh32I0x8WZRtJAh1EzDUmAxESdPaXTxyWl3Ks1bqUhVWJVMONuMBUV9FWgOGz4ddnwm1fNfFIVLoaFbaEhzpcWbqnuK+h4eqL3d5S4Ob/gWCSHeh6+gp7mv0AOKD/oSmC+U6RsSYA6NkOzVN4Uak2MfrSLn5Eq5ALeHzwM6IhDaDXLs8ZrtqzlEqMvO4mJuZM7EB+6xUnnKHY95s/DO85am9Znelmbrhnc9hzf1Vk0vIKNLrxZMezrVZiPxK89zhXSLHtAWZ69ffno21lrjlBDlFKn0gbQT9+cRsBA2CvglGb+c4j/9EDIKXTwL443QXsE3b3nLtEyHnU6+jBZCu+LKzf4uu5gOxyrPNCFzclHOTU/cTl3QWFX0R5XaPKEG//fCrAbVYJkbB4cRJHElQvCmVKZLYwF9MEJWDfzDM1uDUHWvHTAGODP3nFOhmHRsOJEJP9+Uw5qXC7WzPf2DLVip+nyy6nJdJMv00Hm30IRoEsUjCqviK/BeOq5iFRzFHIf4BHtekB3Y3bz+rrVEkK+1NF3BVoDrLU9QIfZK1oQ5k7io2LwkDGa8NkYx+NeVg7aN7AdLroLIus893fvQj5prrVTfBv10Uyp0S4qUlq7DxEFybwr34DqBdC0hNpsiN6z71x9g9vJFus0p3NiJWliUJCvzquw50jGSs7ikLKhvyB2MbTl3TGx2jr72lMfEftl+0mExJKMsreh3ZSXmb6zlpUbtpB7Wy4ilyjtplN/02PHBQhBrqjt4sHrWmkMGCq4aatvsAy3axpBLoziNTxDRZdmylu4cRuh8+2ZySUZq6txJpL0pUi4GyJljNAh0tOFZOOmOmOaF0jn26BcivXr27Ai7Piau17WyZ/veEJyNNv52mXdFHgHS2Y7XXilLqlMzvCM3KnZYaOWUNixnSAxN5FikOowzgh/5BRl3rhrpDVNKxW535RVWXlLlliPUGXd0MltxTcZmON4FA6IHPG8+PTxnQl9BgF7yZ5ST9j5up9VXXLJacbM2PfR4FcXdg/jCLumOJ6zYRu9LF9SymrSqfBly9rHlBBAxJm8LDVRx7NQw1um2FeNB9OyZPRMcN8IMRx4hk5Nmxyv+r6GMWJQGnfpPszmu+icg/ShWIVdDgkwgEULu7LH8mPYrAvky6EgZbrW6er7W3FxWBCkRAzbgSMjtUqJEFwwheMEm X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-Network-Message-Id: 1db8a5d2-dbb8-4179-4ba5-08dba32148fd X-MS-Exchange-CrossTenant-AuthSource: SJ1PR12MB6075.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Aug 2023 15:05:55.9417 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: uzIveX3rjcL0bUBcfafkMfOSKsGjPPB4L25v+7EUTfMum8dzWQi+k51nFgP3Maz4kE2sB3TBoLJKyZo0U4zUYQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR12MB4322 X-Spam-Status: No, score=-1.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, RCVD_IN_DNSWL_BLOCKED,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net X-Patchwork-Delegate: kuba@kernel.org From: Or Gerlitz The static params structure is used in TLS but also in other transports we're offloading like nvmeotcp: - Rename the relevant structures/fields - Create common file for appropriate transports - Apply changes in the TLS code No functional change here. Signed-off-by: Or Gerlitz Signed-off-by: Ben Ben-Ishay Signed-off-by: Aurelien Aptel Reviewed-by: Tariq Toukan --- .../mlx5/core/en_accel/common_utils.h | 32 +++++++++++++++++ .../mellanox/mlx5/core/en_accel/ktls.c | 2 +- .../mellanox/mlx5/core/en_accel/ktls_rx.c | 6 ++-- .../mellanox/mlx5/core/en_accel/ktls_tx.c | 8 ++--- .../mellanox/mlx5/core/en_accel/ktls_txrx.c | 36 ++++++++----------- .../mellanox/mlx5/core/en_accel/ktls_utils.h | 17 ++------- include/linux/mlx5/device.h | 8 ++--- include/linux/mlx5/mlx5_ifc.h | 8 +++-- 8 files changed, 67 insertions(+), 50 deletions(-) create mode 100644 drivers/net/ethernet/mellanox/mlx5/core/en_accel/common_utils.h diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/common_utils.h b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/common_utils.h new file mode 100644 index 000000000000..efdf48125848 --- /dev/null +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/common_utils.h @@ -0,0 +1,32 @@ +/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */ +/* Copyright (c) 2023, NVIDIA CORPORATION & AFFILIATES. */ +#ifndef __MLX5E_COMMON_UTILS_H__ +#define __MLX5E_COMMON_UTILS_H__ + +#include "en.h" + +struct mlx5e_set_transport_static_params_wqe { + struct mlx5_wqe_ctrl_seg ctrl; + struct mlx5_wqe_umr_ctrl_seg uctrl; + struct mlx5_mkey_seg mkc; + struct mlx5_wqe_transport_static_params_seg params; +}; + +/* macros for transport_static_params handling */ +#define MLX5E_TRANSPORT_SET_STATIC_PARAMS_WQEBBS \ + (DIV_ROUND_UP(sizeof(struct mlx5e_set_transport_static_params_wqe), MLX5_SEND_WQE_BB)) + +#define MLX5E_TRANSPORT_FETCH_SET_STATIC_PARAMS_WQE(sq, pi) \ + ((struct mlx5e_set_transport_static_params_wqe *)\ + mlx5e_fetch_wqe(&(sq)->wq, pi, sizeof(struct mlx5e_set_transport_static_params_wqe))) + +#define MLX5E_TRANSPORT_STATIC_PARAMS_WQE_SZ \ + (sizeof(struct mlx5e_set_transport_static_params_wqe)) + +#define MLX5E_TRANSPORT_STATIC_PARAMS_DS_CNT \ + (DIV_ROUND_UP(MLX5E_TRANSPORT_STATIC_PARAMS_WQE_SZ, MLX5_SEND_WQE_DS)) + +#define MLX5E_TRANSPORT_STATIC_PARAMS_OCTWORD_SIZE \ + (MLX5_ST_SZ_BYTES(transport_static_params) / MLX5_SEND_WQE_DS) + +#endif /* __MLX5E_COMMON_UTILS_H__ */ diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls.c index 984fa04bd331..bab9b0c59491 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls.c @@ -100,7 +100,7 @@ bool mlx5e_is_ktls_rx(struct mlx5_core_dev *mdev) return false; /* Check the possibility to post the required ICOSQ WQEs. */ - if (WARN_ON_ONCE(max_sq_wqebbs < MLX5E_TLS_SET_STATIC_PARAMS_WQEBBS)) + if (WARN_ON_ONCE(max_sq_wqebbs < MLX5E_TRANSPORT_SET_STATIC_PARAMS_WQEBBS)) return false; if (WARN_ON_ONCE(max_sq_wqebbs < MLX5E_TLS_SET_PROGRESS_PARAMS_WQEBBS)) return false; diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_rx.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_rx.c index 9b597cb24598..20994773056c 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_rx.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_rx.c @@ -136,16 +136,16 @@ static struct mlx5_wqe_ctrl_seg * post_static_params(struct mlx5e_icosq *sq, struct mlx5e_ktls_offload_context_rx *priv_rx) { - struct mlx5e_set_tls_static_params_wqe *wqe; + struct mlx5e_set_transport_static_params_wqe *wqe; struct mlx5e_icosq_wqe_info wi; u16 pi, num_wqebbs; - num_wqebbs = MLX5E_TLS_SET_STATIC_PARAMS_WQEBBS; + num_wqebbs = MLX5E_TRANSPORT_SET_STATIC_PARAMS_WQEBBS; if (unlikely(!mlx5e_icosq_can_post_wqe(sq, num_wqebbs))) return ERR_PTR(-ENOSPC); pi = mlx5e_icosq_get_next_pi(sq, num_wqebbs); - wqe = MLX5E_TLS_FETCH_SET_STATIC_PARAMS_WQE(sq, pi); + wqe = MLX5E_TRANSPORT_FETCH_SET_STATIC_PARAMS_WQE(sq, pi); mlx5e_ktls_build_static_params(wqe, sq->pc, sq->sqn, &priv_rx->crypto_info, mlx5e_tir_get_tirn(&priv_rx->tir), mlx5_crypto_dek_get_id(priv_rx->dek), diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_tx.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_tx.c index d61be26a4df1..0691995470e2 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_tx.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_tx.c @@ -33,7 +33,7 @@ u16 mlx5e_ktls_get_stop_room(struct mlx5_core_dev *mdev, struct mlx5e_params *pa num_dumps = mlx5e_ktls_dumps_num_wqes(params, MAX_SKB_FRAGS, TLS_MAX_PAYLOAD_SIZE); - stop_room += mlx5e_stop_room_for_wqe(mdev, MLX5E_TLS_SET_STATIC_PARAMS_WQEBBS); + stop_room += mlx5e_stop_room_for_wqe(mdev, MLX5E_TRANSPORT_SET_STATIC_PARAMS_WQEBBS); stop_room += mlx5e_stop_room_for_wqe(mdev, MLX5E_TLS_SET_PROGRESS_PARAMS_WQEBBS); stop_room += num_dumps * mlx5e_stop_room_for_wqe(mdev, MLX5E_KTLS_DUMP_WQEBBS); stop_room += 1; /* fence nop */ @@ -550,12 +550,12 @@ post_static_params(struct mlx5e_txqsq *sq, struct mlx5e_ktls_offload_context_tx *priv_tx, bool fence) { - struct mlx5e_set_tls_static_params_wqe *wqe; + struct mlx5e_set_transport_static_params_wqe *wqe; u16 pi, num_wqebbs; - num_wqebbs = MLX5E_TLS_SET_STATIC_PARAMS_WQEBBS; + num_wqebbs = MLX5E_TRANSPORT_SET_STATIC_PARAMS_WQEBBS; pi = mlx5e_txqsq_get_next_pi(sq, num_wqebbs); - wqe = MLX5E_TLS_FETCH_SET_STATIC_PARAMS_WQE(sq, pi); + wqe = MLX5E_TRANSPORT_FETCH_SET_STATIC_PARAMS_WQE(sq, pi); mlx5e_ktls_build_static_params(wqe, sq->pc, sq->sqn, &priv_tx->crypto_info, priv_tx->tisn, mlx5_crypto_dek_get_id(priv_tx->dek), diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_txrx.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_txrx.c index 570a912dd6fa..8abea6fe6cd9 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_txrx.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_txrx.c @@ -8,10 +8,6 @@ enum { MLX5E_STATIC_PARAMS_CONTEXT_TLS_1_2 = 0x2, }; -enum { - MLX5E_ENCRYPTION_STANDARD_TLS = 0x1, -}; - #define EXTRACT_INFO_FIELDS do { \ salt = info->salt; \ rec_seq = info->rec_seq; \ @@ -20,7 +16,7 @@ enum { } while (0) static void -fill_static_params(struct mlx5_wqe_tls_static_params_seg *params, +fill_static_params(struct mlx5_wqe_transport_static_params_seg *params, union mlx5e_crypto_info *crypto_info, u32 key_id, u32 resync_tcp_sn) { @@ -53,25 +49,25 @@ fill_static_params(struct mlx5_wqe_tls_static_params_seg *params, return; } - gcm_iv = MLX5_ADDR_OF(tls_static_params, ctx, gcm_iv); - initial_rn = MLX5_ADDR_OF(tls_static_params, ctx, initial_record_number); + gcm_iv = MLX5_ADDR_OF(transport_static_params, ctx, gcm_iv); + initial_rn = MLX5_ADDR_OF(transport_static_params, ctx, initial_record_number); memcpy(gcm_iv, salt, salt_sz); memcpy(initial_rn, rec_seq, rec_seq_sz); tls_version = MLX5E_STATIC_PARAMS_CONTEXT_TLS_1_2; - MLX5_SET(tls_static_params, ctx, tls_version, tls_version); - MLX5_SET(tls_static_params, ctx, const_1, 1); - MLX5_SET(tls_static_params, ctx, const_2, 2); - MLX5_SET(tls_static_params, ctx, encryption_standard, - MLX5E_ENCRYPTION_STANDARD_TLS); - MLX5_SET(tls_static_params, ctx, resync_tcp_sn, resync_tcp_sn); - MLX5_SET(tls_static_params, ctx, dek_index, key_id); + MLX5_SET(transport_static_params, ctx, tls_version, tls_version); + MLX5_SET(transport_static_params, ctx, const_1, 1); + MLX5_SET(transport_static_params, ctx, const_2, 2); + MLX5_SET(transport_static_params, ctx, acc_type, + MLX5_TRANSPORT_STATIC_PARAMS_ACC_TYPE_TLS); + MLX5_SET(transport_static_params, ctx, resync_tcp_sn, resync_tcp_sn); + MLX5_SET(transport_static_params, ctx, dek_index, key_id); } void -mlx5e_ktls_build_static_params(struct mlx5e_set_tls_static_params_wqe *wqe, +mlx5e_ktls_build_static_params(struct mlx5e_set_transport_static_params_wqe *wqe, u16 pc, u32 sqn, union mlx5e_crypto_info *crypto_info, u32 tis_tir_num, u32 key_id, u32 resync_tcp_sn, @@ -80,19 +76,17 @@ mlx5e_ktls_build_static_params(struct mlx5e_set_tls_static_params_wqe *wqe, struct mlx5_wqe_umr_ctrl_seg *ucseg = &wqe->uctrl; struct mlx5_wqe_ctrl_seg *cseg = &wqe->ctrl; u8 opmod = direction == TLS_OFFLOAD_CTX_DIR_TX ? - MLX5_OPC_MOD_TLS_TIS_STATIC_PARAMS : - MLX5_OPC_MOD_TLS_TIR_STATIC_PARAMS; - -#define STATIC_PARAMS_DS_CNT DIV_ROUND_UP(sizeof(*wqe), MLX5_SEND_WQE_DS) + MLX5_OPC_MOD_TRANSPORT_TIS_STATIC_PARAMS : + MLX5_OPC_MOD_TRANSPORT_TIR_STATIC_PARAMS; cseg->opmod_idx_opcode = cpu_to_be32((pc << 8) | MLX5_OPCODE_UMR | (opmod << 24)); cseg->qpn_ds = cpu_to_be32((sqn << MLX5_WQE_CTRL_QPN_SHIFT) | - STATIC_PARAMS_DS_CNT); + MLX5E_TRANSPORT_STATIC_PARAMS_DS_CNT); cseg->fm_ce_se = fence ? MLX5_FENCE_MODE_INITIATOR_SMALL : 0; cseg->tis_tir_num = cpu_to_be32(tis_tir_num << 8); ucseg->flags = MLX5_UMR_INLINE; - ucseg->bsf_octowords = cpu_to_be16(MLX5_ST_SZ_BYTES(tls_static_params) / 16); + ucseg->bsf_octowords = cpu_to_be16(MLX5E_TRANSPORT_STATIC_PARAMS_OCTWORD_SIZE); fill_static_params(&wqe->params, crypto_info, key_id, resync_tcp_sn); } diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_utils.h b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_utils.h index 3d79cd379890..5e2d186778aa 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_utils.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_utils.h @@ -6,6 +6,7 @@ #include #include "en.h" +#include "en_accel/common_utils.h" enum { MLX5E_TLS_PROGRESS_PARAMS_AUTH_STATE_NO_OFFLOAD = 0, @@ -33,13 +34,6 @@ union mlx5e_crypto_info { struct tls12_crypto_info_aes_gcm_256 crypto_info_256; }; -struct mlx5e_set_tls_static_params_wqe { - struct mlx5_wqe_ctrl_seg ctrl; - struct mlx5_wqe_umr_ctrl_seg uctrl; - struct mlx5_mkey_seg mkc; - struct mlx5_wqe_tls_static_params_seg params; -}; - struct mlx5e_set_tls_progress_params_wqe { struct mlx5_wqe_ctrl_seg ctrl; struct mlx5_wqe_tls_progress_params_seg params; @@ -50,19 +44,12 @@ struct mlx5e_get_tls_progress_params_wqe { struct mlx5_seg_get_psv psv; }; -#define MLX5E_TLS_SET_STATIC_PARAMS_WQEBBS \ - (DIV_ROUND_UP(sizeof(struct mlx5e_set_tls_static_params_wqe), MLX5_SEND_WQE_BB)) - #define MLX5E_TLS_SET_PROGRESS_PARAMS_WQEBBS \ (DIV_ROUND_UP(sizeof(struct mlx5e_set_tls_progress_params_wqe), MLX5_SEND_WQE_BB)) #define MLX5E_KTLS_GET_PROGRESS_WQEBBS \ (DIV_ROUND_UP(sizeof(struct mlx5e_get_tls_progress_params_wqe), MLX5_SEND_WQE_BB)) -#define MLX5E_TLS_FETCH_SET_STATIC_PARAMS_WQE(sq, pi) \ - ((struct mlx5e_set_tls_static_params_wqe *)\ - mlx5e_fetch_wqe(&(sq)->wq, pi, sizeof(struct mlx5e_set_tls_static_params_wqe))) - #define MLX5E_TLS_FETCH_SET_PROGRESS_PARAMS_WQE(sq, pi) \ ((struct mlx5e_set_tls_progress_params_wqe *)\ mlx5e_fetch_wqe(&(sq)->wq, pi, sizeof(struct mlx5e_set_tls_progress_params_wqe))) @@ -76,7 +63,7 @@ struct mlx5e_get_tls_progress_params_wqe { mlx5e_fetch_wqe(&(sq)->wq, pi, sizeof(struct mlx5e_dump_wqe))) void -mlx5e_ktls_build_static_params(struct mlx5e_set_tls_static_params_wqe *wqe, +mlx5e_ktls_build_static_params(struct mlx5e_set_transport_static_params_wqe *wqe, u16 pc, u32 sqn, union mlx5e_crypto_info *crypto_info, u32 tis_tir_num, u32 key_id, u32 resync_tcp_sn, diff --git a/include/linux/mlx5/device.h b/include/linux/mlx5/device.h index 93399802ba77..3b1d15abc8d7 100644 --- a/include/linux/mlx5/device.h +++ b/include/linux/mlx5/device.h @@ -449,8 +449,8 @@ enum { }; enum { - MLX5_OPC_MOD_TLS_TIS_STATIC_PARAMS = 0x1, - MLX5_OPC_MOD_TLS_TIR_STATIC_PARAMS = 0x2, + MLX5_OPC_MOD_TRANSPORT_TIS_STATIC_PARAMS = 0x1, + MLX5_OPC_MOD_TRANSPORT_TIR_STATIC_PARAMS = 0x2, }; enum { @@ -458,8 +458,8 @@ enum { MLX5_OPC_MOD_TLS_TIR_PROGRESS_PARAMS = 0x2, }; -struct mlx5_wqe_tls_static_params_seg { - u8 ctx[MLX5_ST_SZ_BYTES(tls_static_params)]; +struct mlx5_wqe_transport_static_params_seg { + u8 ctx[MLX5_ST_SZ_BYTES(transport_static_params)]; }; struct mlx5_wqe_tls_progress_params_seg { diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h index 08dcb1f43be7..d44b0795470a 100644 --- a/include/linux/mlx5/mlx5_ifc.h +++ b/include/linux/mlx5/mlx5_ifc.h @@ -12287,12 +12287,16 @@ enum { MLX5_GENERAL_OBJECT_TYPE_ENCRYPTION_KEY_PURPOSE_MACSEC = 0x4, }; -struct mlx5_ifc_tls_static_params_bits { +enum { + MLX5_TRANSPORT_STATIC_PARAMS_ACC_TYPE_TLS = 0x1, +}; + +struct mlx5_ifc_transport_static_params_bits { u8 const_2[0x2]; u8 tls_version[0x4]; u8 const_1[0x2]; u8 reserved_at_8[0x14]; - u8 encryption_standard[0x4]; + u8 acc_type[0x4]; u8 reserved_at_20[0x20];