From patchwork Wed Aug 23 18:06:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pawel Chmielewski X-Patchwork-Id: 13363027 X-Patchwork-Delegate: kuba@kernel.org Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9EBD51ED47 for ; Wed, 23 Aug 2023 18:11:11 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.20]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3D610CC7 for ; Wed, 23 Aug 2023 11:11:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1692814270; x=1724350270; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Ck5OAaGLMA89QFpm2dLib/qCneuqIOms4N0jGvrcWYk=; b=mFOxT+PgaBUYNT8pQ8/8EmeEZbUU06sPVxvfQKhhcbr2CrFNfxZNalRe /1tTkaRJQp8aF4c60uvPrQxoB0urvGWsDLRvPbSbsDmdPznBK2FDVsdbx q6N7Qgdtp/d65IuNfOs1wSZG6/4m0JQZbt5ATKi7Tlc80J5rLFnk4W1Ka Lzw/1pkTGibc8UftL9V7sGmyHlIU0IMM+RwnIrkYabAa4mCuUMgpEvnH0 8sNX2u/cpjEkndHry4woZ8PDEyiBFJg553QoDVHVmFlhfQ+v1vCFmG6oA lZQIxJkhWBAxTOMKtROn2ks9AFB8MYxeU4vMQ9GnrVo83dTYC8vd3GCe7 w==; X-IronPort-AV: E=McAfee;i="6600,9927,10811"; a="364412427" X-IronPort-AV: E=Sophos;i="6.01,195,1684825200"; d="scan'208";a="364412427" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Aug 2023 11:11:09 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10811"; a="802233699" X-IronPort-AV: E=Sophos;i="6.01,195,1684825200"; d="scan'208";a="802233699" Received: from irvmail002.ir.intel.com ([10.43.11.120]) by fmsmga008.fm.intel.com with ESMTP; 23 Aug 2023 11:11:07 -0700 Received: from baltimore.igk.intel.com (baltimore.igk.intel.com [10.102.21.1]) by irvmail002.ir.intel.com (Postfix) with ESMTP id EC03433E8D; Wed, 23 Aug 2023 19:11:06 +0100 (IST) From: Pawel Chmielewski To: intel-wired-lan@osuosl.org Cc: netdev@vger.kernel.org, andrew@lunn.ch, aelior@marvell.com, manishc@marvell.com, Alice Michael , Pawel Chmielewski Subject: [PATCH iwl-next v3 4/8] ice: Add 200G speed/phy type use Date: Wed, 23 Aug 2023 20:06:28 +0200 Message-Id: <20230823180633.2450617-5-pawel.chmielewski@intel.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20230823180633.2450617-1-pawel.chmielewski@intel.com> References: <20230823180633.2450617-1-pawel.chmielewski@intel.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL, SPF_HELO_NONE,SPF_NONE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net X-Patchwork-Delegate: kuba@kernel.org From: Alice Michael Add the support for 200G phy speeds and the mapping for their advertisement in link. Add the new PHY type bits for AQ command, as needed for 200G E830 controllers. Signed-off-by: Alice Michael Co-developed-by: Pawel Chmielewski Signed-off-by: Pawel Chmielewski --- drivers/net/ethernet/intel/ice/ice_adminq_cmd.h | 11 ++++++++++- drivers/net/ethernet/intel/ice/ice_common.c | 1 + drivers/net/ethernet/intel/ice/ice_ethtool.c | 17 +++++++++++++++-- drivers/net/ethernet/intel/ice/ice_ethtool.h | 8 ++++++++ 4 files changed, 34 insertions(+), 3 deletions(-) diff --git a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h index 29f7a9852aec..c38e189ea8f7 100644 --- a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h +++ b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h @@ -1099,7 +1099,15 @@ struct ice_aqc_get_phy_caps { #define ICE_PHY_TYPE_HIGH_100G_CAUI2 BIT_ULL(2) #define ICE_PHY_TYPE_HIGH_100G_AUI2_AOC_ACC BIT_ULL(3) #define ICE_PHY_TYPE_HIGH_100G_AUI2 BIT_ULL(4) -#define ICE_PHY_TYPE_HIGH_MAX_INDEX 4 +#define ICE_PHY_TYPE_HIGH_200G_CR4_PAM4 BIT_ULL(5) +#define ICE_PHY_TYPE_HIGH_200G_SR4 BIT_ULL(6) +#define ICE_PHY_TYPE_HIGH_200G_FR4 BIT_ULL(7) +#define ICE_PHY_TYPE_HIGH_200G_LR4 BIT_ULL(8) +#define ICE_PHY_TYPE_HIGH_200G_DR4 BIT_ULL(9) +#define ICE_PHY_TYPE_HIGH_200G_KR4_PAM4 BIT_ULL(10) +#define ICE_PHY_TYPE_HIGH_200G_AUI4_AOC_ACC BIT_ULL(11) +#define ICE_PHY_TYPE_HIGH_200G_AUI4 BIT_ULL(12) +#define ICE_PHY_TYPE_HIGH_MAX_INDEX 12 struct ice_aqc_get_phy_caps_data { __le64 phy_type_low; /* Use values from ICE_PHY_TYPE_LOW_* */ @@ -1319,6 +1327,7 @@ struct ice_aqc_get_link_status_data { #define ICE_AQ_LINK_SPEED_40GB BIT(8) #define ICE_AQ_LINK_SPEED_50GB BIT(9) #define ICE_AQ_LINK_SPEED_100GB BIT(10) +#define ICE_AQ_LINK_SPEED_200GB BIT(11) #define ICE_AQ_LINK_SPEED_UNKNOWN BIT(15) __le32 reserved3; /* Aligns next field to 8-byte boundary */ __le64 phy_type_low; /* Use values from ICE_PHY_TYPE_LOW_* */ diff --git a/drivers/net/ethernet/intel/ice/ice_common.c b/drivers/net/ethernet/intel/ice/ice_common.c index 983332cbace2..e8225b275f70 100644 --- a/drivers/net/ethernet/intel/ice/ice_common.c +++ b/drivers/net/ethernet/intel/ice/ice_common.c @@ -5666,6 +5666,7 @@ static const u32 ice_aq_to_link_speed[] = { SPEED_40000, SPEED_50000, SPEED_100000, /* BIT(10) */ + SPEED_200000, }; /** diff --git a/drivers/net/ethernet/intel/ice/ice_ethtool.c b/drivers/net/ethernet/intel/ice/ice_ethtool.c index d7e7e1ba2234..68690e89b4e7 100644 --- a/drivers/net/ethernet/intel/ice/ice_ethtool.c +++ b/drivers/net/ethernet/intel/ice/ice_ethtool.c @@ -1718,6 +1718,15 @@ ice_get_ethtool_stats(struct net_device *netdev, ICE_PHY_TYPE_HIGH_100G_AUI2_AOC_ACC | \ ICE_PHY_TYPE_HIGH_100G_AUI2) +#define ICE_PHY_TYPE_HIGH_MASK_200G (ICE_PHY_TYPE_HIGH_200G_CR4_PAM4 | \ + ICE_PHY_TYPE_HIGH_200G_SR4 | \ + ICE_PHY_TYPE_HIGH_200G_FR4 | \ + ICE_PHY_TYPE_HIGH_200G_LR4 | \ + ICE_PHY_TYPE_HIGH_200G_DR4 | \ + ICE_PHY_TYPE_HIGH_200G_KR4_PAM4 | \ + ICE_PHY_TYPE_HIGH_200G_AUI4_AOC_ACC | \ + ICE_PHY_TYPE_HIGH_200G_AUI4) + /** * ice_mask_min_supported_speeds * @hw: pointer to the HW structure @@ -1732,8 +1741,9 @@ ice_mask_min_supported_speeds(struct ice_hw *hw, u64 phy_types_high, u64 *phy_types_low) { /* if QSFP connection with 100G speed, minimum supported speed is 25G */ - if (*phy_types_low & ICE_PHY_TYPE_LOW_MASK_100G || - phy_types_high & ICE_PHY_TYPE_HIGH_MASK_100G) + if ((*phy_types_low & ICE_PHY_TYPE_LOW_MASK_100G) || + (phy_types_high & ICE_PHY_TYPE_HIGH_MASK_100G) || + (phy_types_high & ICE_PHY_TYPE_HIGH_MASK_200G)) *phy_types_low &= ~ICE_PHY_TYPE_LOW_MASK_MIN_25G; else if (!ice_is_100m_speed_supported(hw)) *phy_types_low &= ~ICE_PHY_TYPE_LOW_MASK_MIN_1G; @@ -1876,6 +1886,9 @@ ice_get_settings_link_up(struct ethtool_link_ksettings *ks, ice_phy_type_to_ethtool(netdev, ks); switch (link_info->link_speed) { + case ICE_AQ_LINK_SPEED_200GB: + ks->base.speed = SPEED_200000; + break; case ICE_AQ_LINK_SPEED_100GB: ks->base.speed = SPEED_100000; break; diff --git a/drivers/net/ethernet/intel/ice/ice_ethtool.h b/drivers/net/ethernet/intel/ice/ice_ethtool.h index b403ee79cd5e..b88e3da06f13 100644 --- a/drivers/net/ethernet/intel/ice/ice_ethtool.h +++ b/drivers/net/ethernet/intel/ice/ice_ethtool.h @@ -100,6 +100,14 @@ phy_type_high_lkup[] = { [2] = ICE_PHY_TYPE(100GB, 100000baseCR2_Full), [3] = ICE_PHY_TYPE(100GB, 100000baseSR2_Full), [4] = ICE_PHY_TYPE(100GB, 100000baseCR2_Full), + [5] = ICE_PHY_TYPE(200GB, 200000baseCR4_Full), + [6] = ICE_PHY_TYPE(200GB, 200000baseSR4_Full), + [7] = ICE_PHY_TYPE(200GB, 200000baseLR4_ER4_FR4_Full), + [8] = ICE_PHY_TYPE(200GB, 200000baseLR4_ER4_FR4_Full), + [9] = ICE_PHY_TYPE(200GB, 200000baseDR4_Full), + [10] = ICE_PHY_TYPE(200GB, 200000baseKR4_Full), + [11] = ICE_PHY_TYPE(200GB, 200000baseSR4_Full), + [12] = ICE_PHY_TYPE(200GB, 200000baseCR4_Full), }; #endif /* !_ICE_ETHTOOL_H_ */