From patchwork Tue Aug 29 10:40:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Karol Kolacinski X-Patchwork-Id: 13368804 X-Patchwork-Delegate: kuba@kernel.org Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 796461548A for ; Tue, 29 Aug 2023 10:41:06 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3F8221A2 for ; Tue, 29 Aug 2023 03:41:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1693305663; x=1724841663; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=dvIQlIyW5/EHR6V294K7rz0uzdjKGiqNypRDnnMdsLI=; b=TrLKGRNsYcXA/puDKdljyM1q30qrtZNkSjF8pJ5o40iZ7kG4VGx0Flve WQO0hvGaFcho0JiZrPLPnsP3orvZs7gSs5D22X+CBDa/IYXh9EW/OCyQA s9M4qtyqw37GZBVF0J6VlSf2NLG5WH9uqWhgXWxpVak+kOKv+lfNwOLeK u9YuNssUrugD80L+bKznBhCmyklLkVzf30ozjRvN8f/XGdfLljqmZXal1 vlETgrdutdzVb9gpDhfsJ4Bu2R65pa0Svt07/3C4qJmn49oSt7CYE4uOb SuTQPwIiVEtHUSqEUpCXHbFZSe3f7WKf3GVlumiFGPXikYXVcMUWzZbYS w==; X-IronPort-AV: E=McAfee;i="6600,9927,10816"; a="461696890" X-IronPort-AV: E=Sophos;i="6.02,210,1688454000"; d="scan'208";a="461696890" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Aug 2023 03:41:03 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10816"; a="853229790" X-IronPort-AV: E=Sophos;i="6.02,210,1688454000"; d="scan'208";a="853229790" Received: from kkolacin-desk1.igk.intel.com ([10.102.102.152]) by fmsmga002.fm.intel.com with ESMTP; 29 Aug 2023 03:41:01 -0700 From: Karol Kolacinski To: intel-wired-lan@lists.osuosl.org Cc: netdev@vger.kernel.org, anthony.l.nguyen@intel.com, jesse.brandeburg@intel.com, Jacob Keller , Karol Kolacinski Subject: [PATCH v4 iwl-next 05/11] ice: rename ice_ptp_configure_tx_tstamp Date: Tue, 29 Aug 2023 12:40:35 +0200 Message-Id: <20230829104041.64131-6-karol.kolacinski@intel.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230829104041.64131-1-karol.kolacinski@intel.com> References: <20230829104041.64131-1-karol.kolacinski@intel.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Organization: Intel Technology Poland sp. z o.o. - ul. Slowackiego 173, 80-298 Gdansk - KRS 101882 - NIP 957-07-52-316 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net X-Patchwork-Delegate: kuba@kernel.org From: Jacob Keller The ice_ptp_configure_tx_tstamp function writes to PFINT_OICR_ENA to configure it with the PFINT_OICR_TX_TSYN_M bit. The name of this function is confusing because there are multiple other functions with almost identical names. Rename it to ice_ptp_cfg_tx_interrupt in order to make it more obvious to the reader what action it performs. Signed-off-by: Jacob Keller Signed-off-by: Karol Kolacinski --- drivers/net/ethernet/intel/ice/ice_ptp.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c index f513bbbba9f8..2899fc7f8deb 100644 --- a/drivers/net/ethernet/intel/ice/ice_ptp.c +++ b/drivers/net/ethernet/intel/ice/ice_ptp.c @@ -281,11 +281,11 @@ static const char *ice_ptp_state_str(enum ice_ptp_state state) } /** - * ice_ptp_configure_tx_tstamp - Enable or disable Tx timestamp interrupt - * @pf: The PF pointer to search in + * ice_ptp_cfg_tx_interrupt - Configure Tx timestamp interrupt for the device + * @pf: Board private structure * @on: bool value for whether timestamp interrupt is enabled or disabled */ -static void ice_ptp_configure_tx_tstamp(struct ice_pf *pf, bool on) +static void ice_ptp_cfg_tx_interrupt(struct ice_pf *pf, bool on) { u32 val; @@ -320,7 +320,7 @@ static void ice_set_tx_tstamp(struct ice_pf *pf, bool on) } if (pf->ptp.tx_interrupt_mode == ICE_PTP_TX_INTERRUPT_SELF) - ice_ptp_configure_tx_tstamp(pf, on); + ice_ptp_cfg_tx_interrupt(pf, on); pf->ptp.tstamp_config.tx_type = on ? HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF; } @@ -2850,7 +2850,7 @@ static int ice_ptp_init_owner(struct ice_pf *pf) /* The clock owner for this device type handles the timestamp * interrupt for all ports. */ - ice_ptp_configure_tx_tstamp(pf, true); + ice_ptp_cfg_tx_interrupt(pf, true); /* React on all quads interrupts for E82x */ wr32(hw, PFINT_TSYN_MSK + (0x4 * hw->pf_id), (u32)0x1f); @@ -2928,7 +2928,7 @@ static int ice_ptp_init_port(struct ice_pf *pf, struct ice_ptp_port *ptp_port) * neither on own quad nor on others */ if (!ice_ptp_pf_handles_tx_interrupt(pf)) { - ice_ptp_configure_tx_tstamp(pf, false); + ice_ptp_cfg_tx_interrupt(pf, false); wr32(hw, PFINT_TSYN_MSK + (0x4 * hw->pf_id), (u32)0x0); } kthread_init_delayed_work(&ptp_port->ov_work,